| | PREV | Hardware | Model | Cheilly | D06 | Kylo | Vougeot | M1 | M2 | Chianti |
| RWC+pos+tlbi-sync.ishsWptevapteoa.va-isbspteoa.vap | No, 0/4.1G | Ok, 1/4.2G | Allow | No, 0/880M | No, 0/102M | No, 0/144M | No, 0/2.2G | No, 0/344M | No, 0/48M | Ok, 1/475M |
| | Allow unseen | | | Allow unseen | Allow unseen | Allow unseen | Allow unseen | Allow unseen | Allow unseen | |
| W+RWC+tlbi-sync.ishsptevapteoa.va+pos+pos | No, 0/4.1G | Ok, 2/4.2G | Allow | No, 0/880M | No, 0/102M | No, 0/144M | No, 0/2.2G | No, 0/344M | No, 0/48M | Ok, 2/475M |
| | Allow unseen | | | Allow unseen | Allow unseen | Allow unseen | Allow unseen | Allow unseen | Allow unseen | |
| WRR+2W+pos+posWppteva-tlbi-sync.ishsptevapteoa.va | No, 0/4.1G | Ok, 3/4.2G | Allow | No, 0/880M | No, 0/102M | No, 0/144M | No, 0/2.2G | No, 0/344M | No, 0/48M | Ok, 3/475M |
| | Allow unseen | | | Allow unseen | Allow unseen | Allow unseen | Allow unseen | Allow unseen | Allow unseen | |
| WRR+2W+pos+tlbi-sync.ishsWptevapteoa.va-pospteoa.vap | No, 0/4.1G | Ok, 2/4.2G | Allow | No, 0/880M | No, 0/102M | No, 0/144M | No, 0/2.2G | No, 0/344M | No, 0/48M | Ok, 2/475M |
| | Allow unseen | | | Allow unseen | Allow unseen | Allow unseen | Allow unseen | Allow unseen | Allow unseen | |
| Z6.3+tlbi-sync.ishsptevapteoa.va+pos+pos | No, 0/4.1G | Ok, 2/4.2G | Allow | No, 0/880M | No, 0/102M | No, 0/144M | No, 0/2.2G | No, 0/344M | No, 0/48M | Ok, 2/475M |
| | Allow unseen | | | Allow unseen | Allow unseen | Allow unseen | Allow unseen | Allow unseen | Allow unseen | |
| Marc03+BIS | No, 0/12G | Ok, 1/12G | — | No, 0/2.8G | No, 0/587M | No, 0/1.1G | No, 0/6.9G | No, 0/346M | No, 0/48M | Ok, 1/475M |
| | Allow unseen | | | Allow unseen | Allow unseen | Allow unseen | Allow unseen | Allow unseen | Allow unseen | |
