My machine is a Intel based Linux box. It has 12 cores. I ran tests on all the cores, using litmus option “-a 12”. Here is may log file LUC.txt. The log file being rather verbose, let us select the observation summaries:

% grep Observation LUC.txt
Observation SB Sometimes 731 5999269
Observation SB+mfence+po Sometimes 7 5999993
Observation R Sometimes 61 5999939
Observation R+mfence+po Sometimes 16 5999984
Observation MP Never 0 6000000
Observation MP+mfence+po Never 0 6000000
Observation SB+mfences Never 0 6000000
Observation R+po+mfence Never 0 6000000
Observation R+mfences Never 0 6000000
Observation MP+po+mfence Never 0 6000000
Observation MP+mfences Never 0 6000000
Observation S Never 0 6000000
Observation S+po+mfence Never 0 6000000
Observation LB Never 0 6000000
Observation LB+mfence+po Never 0 6000000
Observation S+mfence+po Never 0 6000000
Observation S+mfences Never 0 6000000
Observation LB+mfences Never 0 6000000
Observation 2+2W Never 0 6000000
Observation 2+2W+mfence+po Never 0 6000000
Observation 2+2W+mfences Never 0 6000000

Hence, four tests only are allowed or, more appropriately , observed: SB, SB+mfence+po, R and R+mfence+po.

• My machine is not SC. Namely, SC forbids all the tests (all tests present a SC-cycle) and some tests are observed.
• My machine may be TSO, since the only observed tests can be explained by relaxing write-to-read pairs.
        
• Inserting a fence at the appropriate place (in-between write-to-read pairs) seems to restore SC, as the tests SB+mfences, R+mfences and R+po+mfence are not observed.
      

I have a second machine, a MacBook-Pro whose processor is a 10 core M1. We use four cores for testing, saving test results in the file MAC.txt.

% litmus7 -mach M1 -a 4 -o R @all
% cd R
% make -j 8 R
% sh run.sh > MAC.txt

Again, we examine observation summaries:

Observation SB Sometimes 24469 19975531
Observation SB+dmb.sy+po Sometimes 7969 19992031
Observation R Sometimes 9976 19990024
Observation R+dmb.sy+po Sometimes 162 19999838
Observation MP Sometimes 3498 19996502
Observation MP+dmb.sy+po Never 0 20000000
Observation SB+dmb.sys Never 0 20000000
Observation R+po+dmb.sy Sometimes 8874 19991126
Observation R+dmb.sys Never 0 20000000
Observation MP+po+dmb.sy Sometimes 3542 19996458
Observation MP+dmb.sys Never 0 20000000
Observation S Sometimes 243 19999757
Observation S+po+dmb.sy Sometimes 78 19999922
Observation LB Never 0 20000000
Observation LB+dmb.sy+po Never 0 20000000
Observation S+dmb.sy+po Never 0 20000000
Observation S+dmb.sys Never 0 20000000
Observation LB+dmb.sys Never 0 20000000
Observation 2+2W Sometimes 832 19999168
Observation 2+2W+dmb.sy+po Sometimes 283 19999717
Observation 2+2W+dmb.sys Never 0 20000000

• This machine is obviouly not SC, as many of the tests are observed.
• Neither is it TSO, as demonstrated by the observation of 2+2W, a test that TSO forbids, as can be checked as follows:

  % herd7 -cat aarch64-tso.cat 2+2W.litmus
  Test 2+2W Allowed
  States 3
  [x]=1; [y]=1;
  [x]=1; [y]=2;
  [x]=2; [y]=1;
  No
  Witnesses
  Positive: 0 Negative: 3
  Condition exists ([x]=2 /\ [y]=2)
  Observation 2+2W Never 0 3
  Time 2+2W 0.00
  Hash=5112e7c862483914f9d4e140b60657b2
  

  One may also read the TSO model and see that write-to-write pairs are part of the Locally-ordered-before relation ⁠lob, and that the coherence relation ⁠co is included in the Observed-before relation ⁠ob.
  
• Finally, none of the “full-fenced” tests is observed, which suggests that barriers between every pair of memory accesses does restore SC.

  grep Observation MAC.txt | grep dmb.sys
  Observation SB+dmb.sys Never 0 20000000
  Observation R+dmb.sys Never 0 20000000
  Observation MP+dmb.sys Never 0 20000000
  Observation S+dmb.sys Never 0 20000000
  Observation LB+dmb.sys Never 0 20000000
  Observation 2+2W+dmb.sys Never 0 20000000