C S+fencewmbreleaseonce+pooncerelease
Hash=db031d87cb73930fff0f9d678a4e3307
Cycle=RfeOnceOnce PodRWOnceRelease WseReleaseRelease FenceWmbdWWReleaseOnce
Relax=WseReleaseRelease
Safe=FenceWmbdWW RfeOnceOnce PodRWOnceRelease
Generator=diy7 (version 7.46+3)
Prefetch=0:x=F,0:y=W,1:y=F,1:x=W
Com=Rf Ws
Orig=FenceWmbdWWReleaseOnce RfeOnceOnce PodRWOnceRelease WseReleaseRelease
{}
P0(int* x,int* y) {
smp_store_release(x,2);
smp_wmb();
WRITE_ONCE(*y,1);
}
P1(int* x,int* y) {
int r0 = READ_ONCE(*y);
smp_store_release(x,1);
}
Observed
x=2; 1:r0=1;
C11 equivalent:
C S+fencewmbreleaseonce+pooncerelease
Hash=db031d87cb73930fff0f9d678a4e3307
Cycle=RfeOnceOnce PodRWOnceRelease WseReleaseRelease FenceWmbdWWReleaseOnce
Relax=WseReleaseRelease
Safe=FenceWmbdWW RfeOnceOnce PodRWOnceRelease
Generator=diy7 (version 7.46+3)
Prefetch=0:x=F,0:y=W,1:y=F,1:x=W
Com=Rf Ws
Orig=FenceWmbdWWReleaseOnce RfeOnceOnce PodRWOnceRelease WseReleaseRelease
{}
P0(atomic_int* x,atomic_int* y) {
atomic_store_explicit(x,2,memory_order_release);
atomic_thread_fence(memory_order_acq_rel);
atomic_store_explicit(y,1,memory_order_relaxed);
}
P1(atomic_int* x,atomic_int* y) {
int r0 = atomic_load_explicit(y,memory_order_relaxed);
atomic_store_explicit(x,1,memory_order_release);
}
exists (x=2 /\ 1:r0=1)