Test MP0137

ARM MP0137
"DMBdWW Rfe PodRW PosWR Fre"
Cycle=Rfe PodRW PosWR Fre DMBdWW
Relax=[Fre,DMBdWW,Rfe]
Safe=PosWR PodRW
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=DMBdWW Rfe PodRW PosWR Fre
{
%x0=x; %y0=y;
%y1=y; %x1=x;
}
 P0           | P1           ;
 MOV R0,#2    | LDR R0,[%y1] ;
 STR R0,[%x0] | MOV R1,#1    ;
 DMB          | STR R1,[%x1] ;
 MOV R1,#1    | LDR R2,[%x1] ;
 STR R1,[%y0] |              ;
Observed
    1:R0=1; 1:R2=1; x=2;
and 1:R0=1; 1:R2=2; x=2;