Test MP+PPO520

ARM MP+PPO520
"Fre DMBdWW Rfe PosRW PosWR PosRR DpAddrdR DpAddrdW PosWR"
Cycle=Rfe PosRW PosWR PosRR DpAddrdR DpAddrdW PosWR Fre DMBdWW
Relax=
Safe=Rfe Fre PosWR PosRW PosRR DMBdWW DpAddrdW DpAddrdR
Prefetch=1:x=T
Orig=Fre DMBdWW Rfe PosRW PosWR PosRR DpAddrdR DpAddrdW PosWR
{
%x0=x; %y0=y;
%y1=y; %z1=z; %x1=x;
}
 P0            | P1               ;
 MOV R0, #2    | LDR R0, [%y1]    ;
 STR R0, [%x0] | MOV R1, #2       ;
 DMB           | STR R1, [%y1]    ;
 MOV R1, #1    | LDR R2, [%y1]    ;
 STR R1, [%y0] | LDR R3, [%y1]    ;
               | EOR R4,R3,R3     ;
               | LDR R5, [R4,%z1] ;
               | EOR R6,R5,R5     ;
               | MOV R7, #1       ;
               | STR R7, [R6,%x1] ;
               | LDR R8, [%x1]    ;
Observed
    1:R0=0; 1:R8=2; x=2; y=2;