Test LB+isb+dmb

ARM LB+isb+dmb
"ISBdRW Rfe DMBdRW Rfe"
Cycle=Rfe ISBdRW Rfe DMBdRW
Prefetch=0:x=F,0:y=W,1:y=F,1:x=W
Com=Rf Rf
Orig=ISBdRW Rfe DMBdRW Rfe
{
%x0=x; %y0=y;
%y1=y; %x1=x;
}
 P0           | P1           ;
 LDR R0,[%x0] | LDR R0,[%y1] ;
 ISB          | DMB          ;
 MOV R1,#1    | MOV R1,#1    ;
 STR R1,[%y0] | STR R1,[%x1] ;
Observed
    0:R0=1; 1:R0=1;