Test LB+PPO0173

ARM LB+PPO0173
"PodWW Rfe DpDatadW Rfe DpDatadW PosWR DpDatadW PosWR DpDatadW"
Cycle=Rfe DpDatadW Rfe DpDatadW PosWR DpDatadW PosWR DpDatadW PodWW
Relax=
Safe=Rfe PosWR Pod*W DpDatadW
Prefetch=
Com=Rf Rf
Orig=PodWW Rfe DpDatadW Rfe DpDatadW PosWR DpDatadW PosWR DpDatadW
{
%b0=b; %x0=x;
%x1=x; %y1=y; %z1=z; %a1=a; %b1=b;
}
 P0           | P1           ;
 LDR R0,[%b0] | LDR R0,[%x1] ;
 EOR R1,R0,R0 | EOR R1,R0,R0 ;
 ADD R1,R1,#1 | ADD R1,R1,#1 ;
 STR R1,[%x0] | STR R1,[%y1] ;
              | LDR R2,[%y1] ;
              | EOR R3,R2,R2 ;
              | ADD R3,R3,#1 ;
              | STR R3,[%z1] ;
              | LDR R4,[%z1] ;
              | EOR R5,R4,R4 ;
              | ADD R5,R5,#1 ;
              | STR R5,[%a1] ;
              | MOV R6,#1    ;
              | STR R6,[%b1] ;
Observed
    0:R0=1; 1:R0=1;