ARM 3.LB+addr+addr+po "DpAddrdW Rfe DpAddrdW Rfe PodRW Rfe" Cycle=Rfe PodRW Rfe DpAddrdW Rfe DpAddrdW Prefetch=0:x=F,0:y=W,1:y=F,1:z=W,2:z=F,2:x=W Com=Rf Rf Rf Orig=DpAddrdW Rfe DpAddrdW Rfe PodRW Rfe { %x0=x; %y0=y; %y1=y; %z1=z; %z2=z; %x2=x; } P0 | P1 | P2 ; LDR R0,[%x0] | LDR R0,[%y1] | LDR R0,[%z2] ; EOR R1,R0,R0 | EOR R1,R0,R0 | MOV R1,#1 ; MOV R2,#1 | MOV R2,#1 | STR R1,[%x2] ; STR R2,[R1,%y0] | STR R2,[R1,%z1] | ; Observed 0:R0=1; 1:R0=1; 2:R0=1;