Test 3.LB+WC+WC+WC

X86_64 3.LB+WC+WC+WC
"PodRW Rfe PodRW Rfe PodRW Rfe"
MT=x:WC,y:WC,z:WC
Cycle=Rfe PodRW Rfe PodRW Rfe PodRW
Generator=diyone7 (version 7.56+02~dev)
Prefetch=0:x=F,0:y=W,1:y=F,1:z=W,2:z=F,2:x=W
Com=Rf Rf Rf
Orig=PodRW Rfe PodRW Rfe PodRW Rfe
Align=
{
}
 P0            | P1            | P2            ;
 movl (x),%eax | movl (y),%eax | movl (z),%eax ;
 movl $1,(y)   | movl $1,(z)   | movl $1,(x)   ;
exists (0:rax=1 /\ 1:rax=1 /\ 2:rax=1)