X86_64 SB+WC+WC+preload "PodWR Fre PodWR Fre" MT=x:WC y:WC Generator=diyone7 (version 7.56+02~dev) Prefetch=0:x=F,0:y=T,1:y=F,1:x=T Com=Fr Fr Orig=PodWR Fre PodWR Fre Align= { } P0 | P1 ; movl (y),%ebx | movl (x),%ebx ; movl (y),%ecx | movl (x),%ecx ; movl $1,(x) | movl $1,(y) ; movl (y),%eax | movl (x),%eax ; exists (0:rax=0 /\ 1:rax=0)