Test 2+2W+mfence+clflushnext+WC+WC

X86_64 2+2W+mfence+clflushnext+WC+WC
"MFencedWW Coe ClFlushNextdWW Coe"
MT=x:WC y:WC
Generator=diyone7 (version 7.56+02~dev)
Prefetch=0:x=F,0:y=W,1:y=F,1:x=W
Com=Co Co
Orig=MFencedWW Coe ClFlushNextdWW Coe
Align=
{
}
 P0          | P1          ;
 movl $2,(x) | movl $2,(y) ;
 mfence      | clflush (x) ;
 movl $1,(y) | movl $1,(x) ;
exists (x=2 /\ y=2)