Test Z6.0+ponaa+po+poana+WB+WC+UC

X86_64 Z6.0+ponaa+po+poana+WB+WC+UC
"PodWWNaA RfeANa PodRW CoeNaA PodWRANa Fre"
MT=x:WB,y:WC,z:UC
Cycle=Fre PodWWNaA RfeANa PodRW CoeNaA PodWRANa
Generator=diyone7 (version 7.56+02~dev)
Prefetch=0:x=F,0:y=W,1:y=F,1:z=W,2:z=F,2:x=T
Com=Rf Co Fr
Orig=PodWWNaA RfeANa PodRW CoeNaA PodWRANa Fre
Align=
{
}
 P0             | P1            | P2             ;
 movl $1,(x)    | movl (y),%eax | movl $2,%eax   ;
 movl $1,%eax   | movl $1,(z)   | xchgl (z),%eax ;
 xchgl (y),%eax |               | movl (x),%ebx  ;
exists (y=1 /\ z=2 /\ 0:rax=0 /\ 1:rax=1 /\ 2:rax=1 /\ 2:rbx=0)