Test MP+ponaa+po+WC+WC

X86_64 MP+ponaa+po+WC+WC
"PodWWNaA RfeANa PodRR Fre"
MT=x:WC,y:WC
Cycle=Fre PodWWNaA RfeANa PodRR
Generator=diyone7 (version 7.56+02~dev)
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=PodWWNaA RfeANa PodRR Fre
Align=
{
}
 P0             | P1            ;
 movl $1,(x)    | movl (y),%eax ;
 movl $1,%eax   | movl (x),%ebx ;
 xchgl (y),%eax |               ;
exists (y=1 /\ 0:rax=0 /\ 1:rax=1 /\ 1:rbx=0)