Test 3.2W+WC+WC+UC

X86_64 3.2W+WC+WC+UC
"PodWW Coe PodWW Coe PodWW Coe"
MT=x:WC,y:WC,z:UC
Cycle=Coe PodWW Coe PodWW Coe PodWW
Generator=diyone7 (version 7.56+02~dev)
Prefetch=0:x=F,0:y=W,1:y=F,1:z=W,2:z=F,2:x=W
Com=Co Co Co
Orig=PodWW Coe PodWW Coe PodWW Coe
Align=
{
}
 P0          | P1          | P2          ;
 movl $2,(x) | movl $2,(y) | movl $2,(z) ;
 movl $1,(y) | movl $1,(z) | movl $1,(x) ;
exists (x=2 /\ y=2 /\ z=2)