Test SB+WB+UC+NT

X86_64 SB+WB+UC+NT
"PodWRNTNa FreNaNT PodWRNTNa FreNaNT"
MT=x:WB y:UC
Cycle=FreNaNT PodWRNTNa FreNaNT PodWRNTNa
Generator=diyone7 (version 7.56+02~dev)
Prefetch=0:x=F,0:y=T,1:y=F,1:x=T
Com=Fr Fr
Orig=PodWRNTNa FreNaNT PodWRNTNa FreNaNT
Align=
{
0:rax=x;
1:rax=y;
}
 P0                  | P1                  ;
 movl $1,%ebx        | movl $1,%ebx        ;
 movntil %ebx,(%rax) | movntil %ebx,(%rax) ;
 movl (y),%ecx       | movl (x),%ecx       ;
exists (x=1 /\ y=1 /\ 0:rcx=0 /\ 1:rcx=0)