Raw log

Thu Dec 24 10:42:53 NFT 2009 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for src/aclwsrr000.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC aclwsrr000 "DpdR Fre SyncdWW Wse Rfe LwSyncsRR" {0:r2=x; 0:r4=y; 1:r2=y; 2:r2=y; 2:r6=x;} P0 | P1 | P2 ; li r1,1 | li r1,2 | lwz r1,0(r2) ; stw r1,0(r2) | stw r1,0(r2) | lwsync ; sync | | lwz r3,0(r2) ; li r3,1 | | xor r4,r3,r3 ; stw r3,0(r4) | | lwzx r5,r4,r6 ; exists (y=2 /\ 2:r1=2 /\ 2:r3=2 /\ 2:r5=0) Generated assembler _litmus_P2_0_: lwz 26,0(11) _litmus_P2_1_: lwsync _litmus_P2_2_: lwz 29,0(11) _litmus_P2_3_: xor 7,29,29 _litmus_P2_4_: lwzx 8,7,9 _litmus_P1_0_: li 11,2 _litmus_P1_1_: stw 11,0(9) _litmus_P0_0_: li 4,1 _litmus_P0_1_: stw 4,0(11) _litmus_P0_2_: sync _litmus_P0_3_: li 3,1 _litmus_P0_4_: stw 3,0(9) Test aclwsrr000 Allowed Histogram (17 states) 1 :>2:r1=2; 2:r3=2; 2:r5=0; y=2; 2133 :>2:r1=0; 2:r3=2; 2:r5=1; y=2; 1805 :>2:r1=0; 2:r3=2; 2:r5=0; y=1; 406 :>2:r1=2; 2:r3=1; 2:r5=1; y=1; 340 :>2:r1=1; 2:r3=2; 2:r5=1; y=2; 1096 :>2:r1=0; 2:r3=1; 2:r5=1; y=2; 547 :>2:r1=0; 2:r3=1; 2:r5=1; y=1; 349 :>2:r1=0; 2:r3=2; 2:r5=1; y=1; 2655362:>2:r1=2; 2:r3=2; 2:r5=1; y=2; 2958050:>2:r1=1; 2:r3=1; 2:r5=1; y=1; 1973703:>2:r1=0; 2:r3=0; 2:r5=0; y=2; 1074835:>2:r1=0; 2:r3=0; 2:r5=1; y=2; 2028095:>2:r1=2; 2:r3=2; 2:r5=1; y=1; 2774341:>2:r1=2; 2:r3=2; 2:r5=0; y=1; 201825:>2:r1=0; 2:r3=0; 2:r5=1; y=1; 4984258:>2:r1=0; 2:r3=0; 2:r5=0; y=1; 2342854:>2:r1=1; 2:r3=1; 2:r5=1; y=2; Ok Witnesses Positive: 1, Negative: 20999999 Condition exists (y=2 /\ 2:r1=2 /\ 2:r3=2 /\ 2:r5=0) is validated Hash=0e168a11add8ac7b91db489d5c03a6a4 Cycle=DpdR Fre SyncdWW Wse Rfe LwSyncsRR Relax aclwsrr000 Ok ACLwSyncsRR Safe=Fre Wse SyncdWW DpdR Time aclwsrr000 1.95 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for src/aclwsrr001.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC aclwsrr001 "DpdR Fre SyncdWW Rfe LwSyncsRR Fre Rfe LwSyncsRR" {0:r2=x; 0:r4=y; 1:r2=y; 2:r2=y; 3:r2=y; 3:r6=x;} P0 | P1 | P2 | P3 ; li r1,1 | lwz r1,0(r2) | li r1,2 | lwz r1,0(r2) ; stw r1,0(r2) | lwsync | stw r1,0(r2) | lwsync ; sync | lwz r3,0(r2) | | lwz r3,0(r2) ; li r3,1 | | | xor r4,r3,r3 ; stw r3,0(r4) | | | lwzx r5,r4,r6 ; exists (y=2 /\ 1:r1=1 /\ 1:r3=1 /\ 3:r1=2 /\ 3:r3=2 /\ 3:r5=0) Generated assembler _litmus_P3_0_: lwz 27,0(11) _litmus_P3_1_: lwsync _litmus_P3_2_: lwz 29,0(11) _litmus_P3_3_: xor 7,29,29 _litmus_P3_4_: lwzx 8,7,9 _litmus_P2_0_: li 7,2 _litmus_P2_1_: stw 7,0(9) _litmus_P1_0_: lwz 31,0(9) _litmus_P1_1_: lwsync _litmus_P1_2_: lwz 11,0(9) _litmus_P0_0_: li 5,1 _litmus_P0_1_: stw 5,0(11) _litmus_P0_2_: sync _litmus_P0_3_: li 4,1 _litmus_P0_4_: stw 4,0(9) Test aclwsrr001 Allowed Histogram (75 states) 2 :>1:r1=2; 1:r3=1; 3:r1=0; 3:r3=0; 3:r5=1; y=1; 24 :>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=1; 3:r5=1; y=1; 7 :>1:r1=0; 1:r3=2; 3:r1=0; 3:r3=0; 3:r5=1; y=1; 40 :>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=2; 3:r5=0; y=1; 111 :>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=2; 3:r5=1; y=2; 33 :>1:r1=0; 1:r3=2; 3:r1=0; 3:r3=0; 3:r5=1; y=2; 9 :>1:r1=0; 1:r3=1; 3:r1=0; 3:r3=0; 3:r5=1; y=1; 94 :>1:r1=2; 1:r3=1; 3:r1=1; 3:r3=1; 3:r5=1; y=1; 36 :>1:r1=0; 1:r3=1; 3:r1=1; 3:r3=1; 3:r5=1; y=1; 44 :>1:r1=2; 1:r3=1; 3:r1=2; 3:r3=2; 3:r5=1; y=1; 28 :>1:r1=0; 1:r3=2; 3:r1=1; 3:r3=1; 3:r5=1; y=2; 61 :>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=1; 3:r5=1; y=1; 47 :>1:r1=0; 1:r3=2; 3:r1=2; 3:r3=2; 3:r5=0; y=1; 30 :>1:r1=0; 1:r3=2; 3:r1=2; 3:r3=2; 3:r5=1; y=1; 220 :>1:r1=0; 1:r3=2; 3:r1=0; 3:r3=0; 3:r5=0; y=1; 83 :>1:r1=0; 1:r3=1; 3:r1=0; 3:r3=0; 3:r5=0; y=2; 78 :>1:r1=0; 1:r3=0; 3:r1=1; 3:r3=2; 3:r5=1; y=2; 45 :>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=2; 3:r5=1; y=1; 268 :>1:r1=0; 1:r3=1; 3:r1=1; 3:r3=1; 3:r5=1; y=2; 152 :>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=1; 3:r5=1; y=2; 21 :>1:r1=1; 1:r3=2; 3:r1=0; 3:r3=0; 3:r5=1; y=2; 101 :>1:r1=2; 1:r3=1; 3:r1=2; 3:r3=2; 3:r5=0; y=1; 26 :>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=1; 3:r5=1; y=1; 132 :>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=1; 3:r5=1; y=2; 64 :>1:r1=1; 1:r3=1; 3:r1=2; 3:r3=1; 3:r5=1; y=1; 139 :>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=2; 3:r5=1; y=2; 57 :>1:r1=1; 1:r3=2; 3:r1=2; 3:r3=2; 3:r5=1; y=2; 18 :>1:r1=0; 1:r3=1; 3:r1=2; 3:r3=2; 3:r5=1; y=1; 83 :>1:r1=1; 1:r3=1; 3:r1=1; 3:r3=2; 3:r5=1; y=2; 141 :>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=2; 3:r5=1; y=1; 68 :>1:r1=0; 1:r3=1; 3:r1=0; 3:r3=0; 3:r5=0; y=1; 217 :>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=2; 3:r5=0; y=1; 43 :>1:r1=2; 1:r3=2; 3:r1=1; 3:r3=2; 3:r5=1; y=2; 76 :>1:r1=1; 1:r3=2; 3:r1=1; 3:r3=1; 3:r5=1; y=2; 35 :>1:r1=0; 1:r3=1; 3:r1=0; 3:r3=0; 3:r5=1; y=2; 59 :>1:r1=0; 1:r3=2; 3:r1=0; 3:r3=0; 3:r5=0; y=2; 106 :>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=2; 3:r5=1; y=2; 10 :>1:r1=0; 1:r3=1; 3:r1=2; 3:r3=2; 3:r5=0; y=1; 43 :>1:r1=0; 1:r3=2; 3:r1=1; 3:r3=1; 3:r5=1; y=1; 123 :>1:r1=0; 1:r3=0; 3:r1=2; 3:r3=1; 3:r5=1; y=1; 129 :>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=2; 3:r5=0; y=1; 232 :>1:r1=0; 1:r3=1; 3:r1=2; 3:r3=2; 3:r5=1; y=2; 122 :>1:r1=2; 1:r3=1; 3:r1=0; 3:r3=0; 3:r5=0; y=1; 164 :>1:r1=2; 1:r3=2; 3:r1=2; 3:r3=1; 3:r5=1; y=1; 25 :>1:r1=1; 1:r3=2; 3:r1=0; 3:r3=0; 3:r5=0; y=2; 197 :>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=1; 3:r5=1; y=2; 147 :>1:r1=0; 1:r3=2; 3:r1=2; 3:r3=2; 3:r5=1; y=2; 44421 :>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=0; 3:r5=1; y=1; 224363:>1:r1=1; 1:r3=1; 3:r1=2; 3:r3=2; 3:r5=0; y=1; 32 :>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=2; 3:r5=1; y=1; 114540:>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=0; 3:r5=1; y=1; 491988:>1:r1=0; 1:r3=0; 3:r1=1; 3:r3=1; 3:r5=1; y=2; 19619 :>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=0; 3:r5=1; y=1; 365769:>1:r1=2; 1:r3=2; 3:r1=1; 3:r3=1; 3:r5=1; y=2; 469117:>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=0; 3:r5=1; y=2; 219228:>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=0; 3:r5=1; y=2; 1007365:>1:r1=1; 1:r3=1; 3:r1=1; 3:r3=1; 3:r5=1; y=1; 454096:>1:r1=1; 1:r3=1; 3:r1=2; 3:r3=2; 3:r5=1; y=2; 1335373:>1:r1=2; 1:r3=2; 3:r1=2; 3:r3=2; 3:r5=0; y=1; 486619:>1:r1=0; 1:r3=0; 3:r1=2; 3:r3=2; 3:r5=0; y=1; 665221:>1:r1=1; 1:r3=1; 3:r1=1; 3:r3=1; 3:r5=1; y=2; 657387:>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=0; 3:r5=0; y=1; 183020:>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=0; 3:r5=1; y=2; 619166:>1:r1=0; 1:r3=0; 3:r1=2; 3:r3=2; 3:r5=1; y=2; 1005247:>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=0; 3:r5=0; y=2; 588233:>1:r1=0; 1:r3=0; 3:r1=2; 3:r3=2; 3:r5=1; y=1; 223207:>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=0; 3:r5=0; y=2; 641403:>1:r1=2; 1:r3=2; 3:r1=2; 3:r3=2; 3:r5=1; y=1; 757872:>1:r1=0; 1:r3=0; 3:r1=1; 3:r3=1; 3:r5=1; y=1; 1124473:>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=0; 3:r5=0; y=1; 936285:>1:r1=2; 1:r3=2; 3:r1=2; 3:r3=2; 3:r5=1; y=2; 385351:>1:r1=1; 1:r3=1; 3:r1=2; 3:r3=2; 3:r5=1; y=1; 1985762:>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=0; 3:r5=0; y=1; 188418:>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=0; 3:r5=0; y=2; 802435:>1:r1=2; 1:r3=2; 3:r1=1; 3:r3=1; 3:r5=1; y=1; No Witnesses Positive: 0, Negative: 16000000 Condition exists (y=2 /\ 1:r1=1 /\ 1:r3=1 /\ 3:r1=2 /\ 3:r3=2 /\ 3:r5=0) is NOT validated Hash=c675ca6562f64b0057e406348aad3876 Cycle=DpdR Fre SyncdWW Rfe LwSyncsRR Fre Rfe LwSyncsRR Relax aclwsrr001 No ACLwSyncsRR Safe=Fre SyncdWW DpdR Time aclwsrr001 2.21 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for src/aclwsrr002.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC aclwsrr002 "DpdR Fre Rfe LwSyncsRR DpdR Fre Rfe LwSyncsRR" {0:r2=x; 0:r6=y; 1:r2=y; 2:r2=y; 2:r6=x; 3:r2=x;} P0 | P1 | P2 | P3 ; lwz r1,0(r2) | li r1,1 | lwz r1,0(r2) | li r1,1 ; lwsync | stw r1,0(r2) | lwsync | stw r1,0(r2) ; lwz r3,0(r2) | | lwz r3,0(r2) | ; xor r4,r3,r3 | | xor r4,r3,r3 | ; lwzx r5,r4,r6 | | lwzx r5,r4,r6 | ; exists (0:r1=1 /\ 0:r3=1 /\ 0:r5=0 /\ 2:r1=1 /\ 2:r3=1 /\ 2:r5=0) Generated assembler _litmus_P3_0_: li 6,1 _litmus_P3_1_: stw 6,0(9) _litmus_P2_0_: lwz 27,0(11) _litmus_P2_1_: lwsync _litmus_P2_2_: lwz 29,0(11) _litmus_P2_3_: xor 7,29,29 _litmus_P2_4_: lwzx 8,7,9 _litmus_P1_0_: li 7,1 _litmus_P1_1_: stw 7,0(9) _litmus_P0_0_: lwz 27,0(11) _litmus_P0_1_: lwsync _litmus_P0_2_: lwz 29,0(11) _litmus_P0_3_: xor 7,29,29 _litmus_P0_4_: lwzx 8,7,9 Test aclwsrr002 Allowed Histogram (32 states) 4 :>0:r1=0; 0:r3=1; 0:r5=0; 2:r1=0; 2:r3=1; 2:r5=1; 3 :>0:r1=1; 0:r3=1; 0:r5=0; 2:r1=1; 2:r3=1; 2:r5=0; 6 :>0:r1=0; 0:r3=1; 0:r5=1; 2:r1=0; 2:r3=1; 2:r5=0; 20 :>0:r1=0; 0:r3=0; 0:r5=1; 2:r1=0; 2:r3=1; 2:r5=1; 189 :>0:r1=0; 0:r3=1; 0:r5=0; 2:r1=0; 2:r3=0; 2:r5=0; 142 :>0:r1=0; 0:r3=0; 0:r5=1; 2:r1=0; 2:r3=1; 2:r5=0; 508 :>0:r1=1; 0:r3=1; 0:r5=0; 2:r1=0; 2:r3=1; 2:r5=1; 287 :>0:r1=0; 0:r3=0; 0:r5=0; 2:r1=0; 2:r3=1; 2:r5=0; 508 :>0:r1=1; 0:r3=1; 0:r5=1; 2:r1=0; 2:r3=1; 2:r5=1; 330 :>0:r1=0; 0:r3=1; 0:r5=1; 2:r1=1; 2:r3=1; 2:r5=1; 166 :>0:r1=0; 0:r3=1; 0:r5=0; 2:r1=0; 2:r3=0; 2:r5=1; 31 :>0:r1=0; 0:r3=1; 0:r5=1; 2:r1=0; 2:r3=0; 2:r5=1; 445 :>0:r1=0; 0:r3=0; 0:r5=1; 2:r1=0; 2:r3=0; 2:r5=1; 225 :>0:r1=0; 0:r3=1; 0:r5=0; 2:r1=1; 2:r3=1; 2:r5=1; 714 :>0:r1=0; 0:r3=1; 0:r5=1; 2:r1=0; 2:r3=0; 2:r5=0; 1165 :>0:r1=0; 0:r3=0; 0:r5=0; 2:r1=0; 2:r3=1; 2:r5=1; 454 :>0:r1=1; 0:r3=1; 0:r5=1; 2:r1=0; 2:r3=1; 2:r5=0; 407 :>0:r1=0; 0:r3=1; 0:r5=1; 2:r1=1; 2:r3=1; 2:r5=0; 389425:>0:r1=1; 0:r3=1; 0:r5=0; 2:r1=1; 2:r3=1; 2:r5=1; 866903:>0:r1=1; 0:r3=1; 0:r5=0; 2:r1=0; 2:r3=0; 2:r5=1; 693501:>0:r1=0; 0:r3=0; 0:r5=1; 2:r1=0; 2:r3=0; 2:r5=0; 844935:>0:r1=0; 0:r3=0; 0:r5=1; 2:r1=1; 2:r3=1; 2:r5=1; 1575601:>0:r1=1; 0:r3=1; 0:r5=1; 2:r1=0; 2:r3=0; 2:r5=0; 443345:>0:r1=1; 0:r3=1; 0:r5=1; 2:r1=1; 2:r3=1; 2:r5=0; 454792:>0:r1=0; 0:r3=0; 0:r5=0; 2:r1=1; 2:r3=1; 2:r5=0; 1599727:>0:r1=0; 0:r3=0; 0:r5=0; 2:r1=1; 2:r3=1; 2:r5=1; 3702214:>0:r1=1; 0:r3=1; 0:r5=1; 2:r1=1; 2:r3=1; 2:r5=1; 427021:>0:r1=1; 0:r3=1; 0:r5=0; 2:r1=0; 2:r3=0; 2:r5=0; 651048:>0:r1=0; 0:r3=0; 0:r5=0; 2:r1=0; 2:r3=0; 2:r5=1; 887549:>0:r1=1; 0:r3=1; 0:r5=1; 2:r1=0; 2:r3=0; 2:r5=1; 898759:>0:r1=0; 0:r3=0; 0:r5=1; 2:r1=1; 2:r3=1; 2:r5=0; 2559576:>0:r1=0; 0:r3=0; 0:r5=0; 2:r1=0; 2:r3=0; 2:r5=0; Ok Witnesses Positive: 3, Negative: 15999997 Condition exists (0:r1=1 /\ 0:r3=1 /\ 0:r5=0 /\ 2:r1=1 /\ 2:r3=1 /\ 2:r5=0) is validated Hash=050ce9f57369bcd60ead287482f2d6b6 Cycle=DpdR Fre Rfe LwSyncsRR DpdR Fre Rfe LwSyncsRR Relax aclwsrr002 Ok ACLwSyncsRR Safe=Fre DpdR Time aclwsrr002 1.95 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for src/aclwsrr003.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC aclwsrr003 "Fre SyncdWW Rfe LwSyncsRR DpdR Fre Rfe LwSyncsRR" {0:r2=y; 0:r4=x; 1:r2=x; 1:r6=y; 2:r2=y; 3:r2=y;} P0 | P1 | P2 | P3 ; li r1,2 | lwz r1,0(r2) | li r1,1 | lwz r1,0(r2) ; stw r1,0(r2) | lwsync | stw r1,0(r2) | lwsync ; sync | lwz r3,0(r2) | | lwz r3,0(r2) ; li r3,1 | xor r4,r3,r3 | | ; stw r3,0(r4) | lwzx r5,r4,r6 | | ; exists (y=2 /\ 1:r1=1 /\ 1:r3=1 /\ 1:r5=0 /\ 3:r1=1 /\ 3:r3=1) Generated assembler _litmus_P3_0_: lwz 31,0(9) _litmus_P3_1_: lwsync _litmus_P3_2_: lwz 11,0(9) _litmus_P2_0_: li 7,1 _litmus_P2_1_: stw 7,0(9) _litmus_P1_0_: lwz 27,0(11) _litmus_P1_1_: lwsync _litmus_P1_2_: lwz 29,0(11) _litmus_P1_3_: xor 7,29,29 _litmus_P1_4_: lwzx 8,7,9 _litmus_P0_0_: li 5,2 _litmus_P0_1_: stw 5,0(11) _litmus_P0_2_: sync _litmus_P0_3_: li 4,1 _litmus_P0_4_: stw 4,0(9) Test aclwsrr003 Allowed Histogram (63 states) 2 :>1:r1=0; 1:r3=0; 1:r5=1; 3:r1=2; 3:r3=1; y=1; 5 :>1:r1=0; 1:r3=0; 1:r5=1; 3:r1=0; 3:r3=1; y=1; 27 :>1:r1=0; 1:r3=0; 1:r5=2; 3:r1=0; 3:r3=2; y=1; 108 :>1:r1=0; 1:r3=0; 1:r5=2; 3:r1=0; 3:r3=1; y=2; 197 :>1:r1=1; 1:r3=1; 1:r5=1; 3:r1=0; 3:r3=2; y=1; 26 :>1:r1=1; 1:r3=1; 1:r5=2; 3:r1=0; 3:r3=2; y=1; 54 :>1:r1=1; 1:r3=1; 1:r5=2; 3:r1=0; 3:r3=2; y=2; 8 :>1:r1=0; 1:r3=0; 1:r5=1; 3:r1=0; 3:r3=2; y=1; 26 :>1:r1=0; 1:r3=0; 1:r5=1; 3:r1=0; 3:r3=2; y=2; 90 :>1:r1=0; 1:r3=0; 1:r5=2; 3:r1=0; 3:r3=2; y=2; 58 :>1:r1=1; 1:r3=1; 1:r5=2; 3:r1=0; 3:r3=1; y=2; 45 :>1:r1=1; 1:r3=1; 1:r5=2; 3:r1=1; 3:r3=2; y=2; 13 :>1:r1=0; 1:r3=1; 1:r5=2; 3:r1=0; 3:r3=0; y=1; 19 :>1:r1=1; 1:r3=1; 1:r5=1; 3:r1=0; 3:r3=1; y=1; 50 :>1:r1=0; 1:r3=0; 1:r5=0; 3:r1=2; 3:r3=1; y=1; 25 :>1:r1=0; 1:r3=0; 1:r5=2; 3:r1=2; 3:r3=1; y=1; 1 :>1:r1=1; 1:r3=1; 1:r5=2; 3:r1=0; 3:r3=1; y=1; 438 :>1:r1=0; 1:r3=1; 1:r5=2; 3:r1=2; 3:r3=2; y=1; 17 :>1:r1=0; 1:r3=0; 1:r5=2; 3:r1=0; 3:r3=1; y=1; 51 :>1:r1=0; 1:r3=1; 1:r5=2; 3:r1=1; 3:r3=1; y=1; 158 :>1:r1=0; 1:r3=1; 1:r5=2; 3:r1=0; 3:r3=0; y=2; 90 :>1:r1=0; 1:r3=1; 1:r5=1; 3:r1=2; 3:r3=2; y=1; 219 :>1:r1=0; 1:r3=1; 1:r5=1; 3:r1=1; 3:r3=1; y=1; 52 :>1:r1=1; 1:r3=1; 1:r5=2; 3:r1=2; 3:r3=1; y=1; 85 :>1:r1=0; 1:r3=0; 1:r5=0; 3:r1=0; 3:r3=1; y=1; 194 :>1:r1=0; 1:r3=0; 1:r5=1; 3:r1=0; 3:r3=1; y=2; 120 :>1:r1=0; 1:r3=0; 1:r5=1; 3:r1=1; 3:r3=2; y=2; 167 :>1:r1=0; 1:r3=0; 1:r5=0; 3:r1=0; 3:r3=1; y=2; 58 :>1:r1=0; 1:r3=0; 1:r5=0; 3:r1=0; 3:r3=2; y=2; 144 :>1:r1=0; 1:r3=1; 1:r5=2; 3:r1=2; 3:r3=2; y=2; 139 :>1:r1=0; 1:r3=1; 1:r5=1; 3:r1=0; 3:r3=0; y=1; 46 :>1:r1=0; 1:r3=0; 1:r5=2; 3:r1=1; 3:r3=2; y=2; 135 :>1:r1=0; 1:r3=1; 1:r5=2; 3:r1=1; 3:r3=1; y=2; 91 :>1:r1=1; 1:r3=1; 1:r5=1; 3:r1=2; 3:r3=1; y=1; 292 :>1:r1=0; 1:r3=0; 1:r5=0; 3:r1=0; 3:r3=2; y=1; 59 :>1:r1=0; 1:r3=0; 1:r5=0; 3:r1=1; 3:r3=2; y=2; 20455 :>1:r1=0; 1:r3=0; 1:r5=1; 3:r1=2; 3:r3=2; y=1; 85158 :>1:r1=1; 1:r3=1; 1:r5=2; 3:r1=0; 3:r3=0; y=1; 302420:>1:r1=1; 1:r3=1; 1:r5=2; 3:r1=0; 3:r3=0; y=2; 517655:>1:r1=0; 1:r3=0; 1:r5=2; 3:r1=0; 3:r3=0; y=2; 98113 :>1:r1=0; 1:r3=0; 1:r5=1; 3:r1=1; 3:r3=1; y=1; 141266:>1:r1=0; 1:r3=0; 1:r5=1; 3:r1=0; 3:r3=0; y=1; 790608:>1:r1=1; 1:r3=1; 1:r5=2; 3:r1=2; 3:r3=2; y=2; 548408:>1:r1=0; 1:r3=0; 1:r5=0; 3:r1=2; 3:r3=2; y=1; 434746:>1:r1=0; 1:r3=0; 1:r5=2; 3:r1=1; 3:r3=1; y=2; 175312:>1:r1=1; 1:r3=1; 1:r5=2; 3:r1=1; 3:r3=1; y=1; 382661:>1:r1=0; 1:r3=0; 1:r5=2; 3:r1=0; 3:r3=0; y=1; 695450:>1:r1=0; 1:r3=0; 1:r5=0; 3:r1=1; 3:r3=1; y=2; 261653:>1:r1=0; 1:r3=0; 1:r5=2; 3:r1=1; 3:r3=1; y=1; 1396883:>1:r1=0; 1:r3=0; 1:r5=1; 3:r1=1; 3:r3=1; y=2; 1465301:>1:r1=0; 1:r3=0; 1:r5=0; 3:r1=0; 3:r3=0; y=2; 881826:>1:r1=1; 1:r3=1; 1:r5=1; 3:r1=2; 3:r3=2; y=1; 494217:>1:r1=0; 1:r3=0; 1:r5=2; 3:r1=2; 3:r3=2; y=2; 595318:>1:r1=1; 1:r3=1; 1:r5=1; 3:r1=0; 3:r3=0; y=1; 752064:>1:r1=1; 1:r3=1; 1:r5=2; 3:r1=2; 3:r3=2; y=1; 344664:>1:r1=1; 1:r3=1; 1:r5=2; 3:r1=1; 3:r3=1; y=2; 1252058:>1:r1=0; 1:r3=0; 1:r5=0; 3:r1=0; 3:r3=0; y=1; 363324:>1:r1=0; 1:r3=0; 1:r5=2; 3:r1=2; 3:r3=2; y=1; 580668:>1:r1=0; 1:r3=0; 1:r5=0; 3:r1=1; 3:r3=1; y=1; 551931:>1:r1=0; 1:r3=0; 1:r5=1; 3:r1=2; 3:r3=2; y=2; 641527:>1:r1=0; 1:r3=0; 1:r5=0; 3:r1=2; 3:r3=2; y=2; 756639:>1:r1=0; 1:r3=0; 1:r5=1; 3:r1=0; 3:r3=0; y=2; 1466366:>1:r1=1; 1:r3=1; 1:r5=1; 3:r1=1; 3:r3=1; y=1; No Witnesses Positive: 0, Negative: 16000000 Condition exists (y=2 /\ 1:r1=1 /\ 1:r3=1 /\ 1:r5=0 /\ 3:r1=1 /\ 3:r3=1) is NOT validated Hash=64f32c8ca1b20169e4b2c9aa8c52b1dc Cycle=Fre SyncdWW Rfe LwSyncsRR DpdR Fre Rfe LwSyncsRR Relax aclwsrr003 No ACLwSyncsRR Safe=Fre SyncdWW DpdR Time aclwsrr003 2.05 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for src/aclwsrr004.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC aclwsrr004 "Fre SyncdWW Wse SyncdWW Rfe LwSyncsRR" {0:r2=y; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y;} P0 | P1 | P2 ; li r1,2 | li r1,2 | lwz r1,0(r2) ; stw r1,0(r2) | stw r1,0(r2) | lwsync ; sync | sync | lwz r3,0(r2) ; li r3,1 | li r3,1 | ; stw r3,0(r4) | stw r3,0(r4) | ; exists (x=2 /\ y=2 /\ 2:r1=1 /\ 2:r3=1) Generated assembler _litmus_P2_0_: lwz 31,0(9) _litmus_P2_1_: lwsync _litmus_P2_2_: lwz 11,0(9) _litmus_P1_0_: li 4,2 _litmus_P1_1_: stw 4,0(11) _litmus_P1_2_: sync _litmus_P1_3_: li 3,1 _litmus_P1_4_: stw 3,0(9) _litmus_P0_0_: li 4,2 _litmus_P0_1_: stw 4,0(11) _litmus_P0_2_: sync _litmus_P0_3_: li 3,1 _litmus_P0_4_: stw 3,0(9) Test aclwsrr004 Allowed Histogram (18 states) 281 :>2:r1=0; 2:r3=2; x=1; y=1; 61 :>2:r1=2; 2:r3=1; x=1; y=1; 576 :>2:r1=0; 2:r3=2; x=1; y=2; 325 :>2:r1=0; 2:r3=2; x=2; y=1; 29 :>2:r1=0; 2:r3=1; x=2; y=1; 126 :>2:r1=0; 2:r3=1; x=1; y=1; 1250 :>2:r1=0; 2:r3=1; x=1; y=2; 359 :>2:r1=2; 2:r3=1; x=2; y=1; 264 :>2:r1=1; 2:r3=2; x=1; y=2; 479956:>2:r1=2; 2:r3=2; x=1; y=1; 2518033:>2:r1=2; 2:r3=2; x=1; y=2; 2561404:>2:r1=0; 2:r3=0; x=1; y=1; 4541810:>2:r1=2; 2:r3=2; x=2; y=1; 1958520:>2:r1=0; 2:r3=0; x=2; y=1; 1190894:>2:r1=1; 2:r3=1; x=1; y=1; 1425181:>2:r1=1; 2:r3=1; x=2; y=1; 3821254:>2:r1=0; 2:r3=0; x=1; y=2; 2499677:>2:r1=1; 2:r3=1; x=1; y=2; No Witnesses Positive: 0, Negative: 21000000 Condition exists (x=2 /\ y=2 /\ 2:r1=1 /\ 2:r3=1) is NOT validated Hash=569be80be0adfd6309c25c628b29f141 Cycle=Fre SyncdWW Wse SyncdWW Rfe LwSyncsRR Relax aclwsrr004 No ACLwSyncsRR Safe=Fre Wse SyncdWW Time aclwsrr004 1.89 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for src/aclwsrr005.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC aclwsrr005 "DpdR Fre SyncdWW Wse SyncdWW Rfe LwSyncsRR" {0:r2=x; 0:r4=y; 1:r2=y; 1:r4=z; 2:r2=z; 2:r6=x;} P0 | P1 | P2 ; li r1,1 | li r1,2 | lwz r1,0(r2) ; stw r1,0(r2) | stw r1,0(r2) | lwsync ; sync | sync | lwz r3,0(r2) ; li r3,1 | li r3,1 | xor r4,r3,r3 ; stw r3,0(r4) | stw r3,0(r4) | lwzx r5,r4,r6 ; exists (y=2 /\ 2:r1=1 /\ 2:r3=1 /\ 2:r5=0) Generated assembler _litmus_P2_0_: lwz 26,0(11) _litmus_P2_1_: lwsync _litmus_P2_2_: lwz 29,0(11) _litmus_P2_3_: xor 7,29,29 _litmus_P2_4_: lwzx 8,7,9 _litmus_P1_0_: li 4,2 _litmus_P1_1_: stw 4,0(11) _litmus_P1_2_: sync _litmus_P1_3_: li 3,1 _litmus_P1_4_: stw 3,0(9) _litmus_P0_0_: li 31,1 _litmus_P0_1_: stw 31,0(11) _litmus_P0_2_: sync _litmus_P0_3_: li 3,1 _litmus_P0_4_: stw 3,0(9) Test aclwsrr005 Allowed Histogram (10 states) 342 :>2:r1=0; 2:r3=1; 2:r5=0; y=1; 280 :>2:r1=0; 2:r3=1; 2:r5=1; y=2; 528 :>2:r1=0; 2:r3=1; 2:r5=1; y=1; 1282225:>2:r1=1; 2:r3=1; 2:r5=1; y=2; 2031741:>2:r1=0; 2:r3=0; 2:r5=0; y=2; 633420:>2:r1=0; 2:r3=0; 2:r5=1; y=1; 4355988:>2:r1=1; 2:r3=1; 2:r5=1; y=1; 1715773:>2:r1=1; 2:r3=1; 2:r5=0; y=1; 4837540:>2:r1=0; 2:r3=0; 2:r5=1; y=2; 6142163:>2:r1=0; 2:r3=0; 2:r5=0; y=1; No Witnesses Positive: 0, Negative: 21000000 Condition exists (y=2 /\ 2:r1=1 /\ 2:r3=1 /\ 2:r5=0) is NOT validated Hash=13328fc026d40de24635d6a5f82ebf59 Cycle=DpdR Fre SyncdWW Wse SyncdWW Rfe LwSyncsRR Relax aclwsrr005 No ACLwSyncsRR Safe=Fre Wse SyncdWW DpdR Time aclwsrr005 2.00 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for src/aclwsrr006.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC aclwsrr006 "Fre SyncdWW Rfe LwSyncsRR Fre SyncdWW Rfe LwSyncsRR" {0:r2=y; 0:r4=x; 1:r2=x; 2:r2=x; 2:r4=y; 3:r2=y;} P0 | P1 | P2 | P3 ; li r1,2 | lwz r1,0(r2) | li r1,2 | lwz r1,0(r2) ; stw r1,0(r2) | lwsync | stw r1,0(r2) | lwsync ; sync | lwz r3,0(r2) | sync | lwz r3,0(r2) ; li r3,1 | | li r3,1 | ; stw r3,0(r4) | | stw r3,0(r4) | ; exists (x=2 /\ y=2 /\ 1:r1=1 /\ 1:r3=1 /\ 3:r1=1 /\ 3:r3=1) Generated assembler _litmus_P3_0_: lwz 31,0(9) _litmus_P3_1_: lwsync _litmus_P3_2_: lwz 11,0(9) _litmus_P2_0_: li 5,2 _litmus_P2_1_: stw 5,0(11) _litmus_P2_2_: sync _litmus_P2_3_: li 4,1 _litmus_P2_4_: stw 4,0(9) _litmus_P1_0_: lwz 31,0(9) _litmus_P1_1_: lwsync _litmus_P1_2_: lwz 11,0(9) _litmus_P0_0_: li 5,2 _litmus_P0_1_: stw 5,0(11) _litmus_P0_2_: sync _litmus_P0_3_: li 4,1 _litmus_P0_4_: stw 4,0(9) Test aclwsrr006 Allowed Histogram (80 states) 6 :>1:r1=0; 1:r3=2; 3:r1=1; 3:r3=1; x=1; y=1; 2 :>1:r1=0; 1:r3=2; 3:r1=2; 3:r3=2; x=1; y=2; 4 :>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=1; x=2; y=1; 15 :>1:r1=0; 1:r3=0; 3:r1=1; 3:r3=2; x=1; y=2; 13 :>1:r1=1; 1:r3=2; 3:r1=1; 3:r3=1; x=2; y=1; 6 :>1:r1=0; 1:r3=1; 3:r1=2; 3:r3=2; x=1; y=2; 32 :>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=2; x=1; y=1; 112 :>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=2; x=2; y=1; 76 :>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=2; x=2; y=1; 28 :>1:r1=1; 1:r3=2; 3:r1=0; 3:r3=0; x=2; y=1; 4 :>1:r1=2; 1:r3=1; 3:r1=2; 3:r3=2; x=1; y=1; 4 :>1:r1=0; 1:r3=1; 3:r1=1; 3:r3=1; x=1; y=2; 14 :>1:r1=0; 1:r3=1; 3:r1=2; 3:r3=2; x=1; y=1; 120 :>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=2; x=1; y=2; 41 :>1:r1=2; 1:r3=1; 3:r1=0; 3:r3=0; x=1; y=1; 25 :>1:r1=0; 1:r3=1; 3:r1=0; 3:r3=0; x=1; y=2; 336 :>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=2; x=2; y=1; 24 :>1:r1=0; 1:r3=1; 3:r1=1; 3:r3=1; x=1; y=1; 67 :>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=1; x=1; y=2; 70 :>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=1; x=1; y=2; 13 :>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=1; x=1; y=1; 26 :>1:r1=0; 1:r3=2; 3:r1=1; 3:r3=1; x=2; y=1; 81 :>1:r1=0; 1:r3=1; 3:r1=1; 3:r3=1; x=2; y=1; 21 :>1:r1=0; 1:r3=0; 3:r1=2; 3:r3=1; x=1; y=1; 89 :>1:r1=1; 1:r3=1; 3:r1=2; 3:r3=1; x=2; y=1; 496 :>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=1; x=1; y=2; 16 :>1:r1=1; 1:r3=1; 3:r1=2; 3:r3=1; x=1; y=1; 12 :>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=1; x=1; y=1; 54 :>1:r1=0; 1:r3=2; 3:r1=2; 3:r3=2; x=2; y=1; 27 :>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=1; x=2; y=1; 468 :>1:r1=0; 1:r3=1; 3:r1=2; 3:r3=2; x=2; y=1; 288 :>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=2; x=1; y=1; 33 :>1:r1=0; 1:r3=2; 3:r1=0; 3:r3=0; x=2; y=1; 33 :>1:r1=0; 1:r3=2; 3:r1=0; 3:r3=0; x=1; y=1; 63 :>1:r1=0; 1:r3=2; 3:r1=0; 3:r3=0; x=1; y=2; 75 :>1:r1=2; 1:r3=1; 3:r1=1; 3:r3=1; x=1; y=2; 3 :>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=1; x=2; y=1; 36 :>1:r1=0; 1:r3=1; 3:r1=0; 3:r3=0; x=1; y=1; 113 :>1:r1=1; 1:r3=2; 3:r1=2; 3:r3=2; x=2; y=1; 53 :>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=2; x=1; y=1; 7 :>1:r1=0; 1:r3=2; 3:r1=2; 3:r3=2; x=1; y=1; 68 :>1:r1=2; 1:r3=2; 3:r1=2; 3:r3=1; x=2; y=1; 32 :>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=1; x=1; y=1; 7 :>1:r1=2; 1:r3=2; 3:r1=2; 3:r3=1; x=1; y=1; 83 :>1:r1=2; 1:r3=2; 3:r1=1; 3:r3=2; x=1; y=2; 185 :>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=2; x=1; y=2; 49 :>1:r1=0; 1:r3=1; 3:r1=0; 3:r3=0; x=2; y=1; 37 :>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=2; x=1; y=2; 69 :>1:r1=0; 1:r3=0; 3:r1=2; 3:r3=1; x=2; y=1; 92 :>1:r1=2; 1:r3=1; 3:r1=0; 3:r3=0; x=1; y=2; 89 :>1:r1=2; 1:r3=1; 3:r1=2; 3:r3=2; x=1; y=2; 16 :>1:r1=2; 1:r3=1; 3:r1=1; 3:r3=1; x=1; y=1; 16 :>1:r1=1; 1:r3=1; 3:r1=1; 3:r3=2; x=1; y=2; 163217:>1:r1=1; 1:r3=1; 3:r1=1; 3:r3=1; x=1; y=2; 196409:>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=0; x=1; y=2; 174281:>1:r1=1; 1:r3=1; 3:r1=1; 3:r3=1; x=2; y=1; 414797:>1:r1=1; 1:r3=1; 3:r1=2; 3:r3=2; x=1; y=2; 216398:>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=0; x=2; y=1; 181119:>1:r1=0; 1:r3=0; 3:r1=1; 3:r3=1; x=2; y=1; 241515:>1:r1=0; 1:r3=0; 3:r1=2; 3:r3=2; x=1; y=2; 342649:>1:r1=1; 1:r3=1; 3:r1=1; 3:r3=1; x=1; y=1; 453861:>1:r1=0; 1:r3=0; 3:r1=1; 3:r3=1; x=1; y=1; 437688:>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=0; x=1; y=1; 172130:>1:r1=1; 1:r3=1; 3:r1=2; 3:r3=2; x=1; y=1; 331662:>1:r1=0; 1:r3=0; 3:r1=2; 3:r3=2; x=1; y=1; 1308345:>1:r1=1; 1:r3=1; 3:r1=2; 3:r3=2; x=2; y=1; 1226687:>1:r1=0; 1:r3=0; 3:r1=2; 3:r3=2; x=2; y=1; 327446:>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=0; x=1; y=1; 1267782:>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=0; x=1; y=2; 1025514:>1:r1=2; 1:r3=2; 3:r1=2; 3:r3=2; x=1; y=2; 242379:>1:r1=0; 1:r3=0; 3:r1=1; 3:r3=1; x=1; y=2; 1294980:>1:r1=2; 1:r3=2; 3:r1=1; 3:r3=1; x=1; y=2; 68143 :>1:r1=2; 1:r3=2; 3:r1=2; 3:r3=2; x=1; y=1; 447476:>1:r1=2; 1:r3=2; 3:r1=1; 3:r3=1; x=2; y=1; 1258576:>1:r1=2; 1:r3=2; 3:r1=0; 3:r3=0; x=1; y=2; 1549622:>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=0; x=1; y=1; 1007721:>1:r1=2; 1:r3=2; 3:r1=2; 3:r3=2; x=2; y=1; 187164:>1:r1=2; 1:r3=2; 3:r1=1; 3:r3=1; x=1; y=1; 1238894:>1:r1=0; 1:r3=0; 3:r1=0; 3:r3=0; x=2; y=1; 219796:>1:r1=1; 1:r3=1; 3:r1=0; 3:r3=0; x=2; y=1; No Witnesses Positive: 0, Negative: 16000000 Condition exists (x=2 /\ y=2 /\ 1:r1=1 /\ 1:r3=1 /\ 3:r1=1 /\ 3:r3=1) is NOT validated Hash=48b344c66a10f5449e84d762981f2801 Cycle=Fre SyncdWW Rfe LwSyncsRR Fre SyncdWW Rfe LwSyncsRR Relax aclwsrr006 No ACLwSyncsRR Safe=Fre SyncdWW Time aclwsrr006 2.14 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for src/aclwsrr007.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC aclwsrr007 "DpdR Fre SyncdWW Rfe LwSyncsRR" {0:r2=x; 0:r4=y; 1:r2=y; 1:r6=x;} P0 | P1 ; li r1,1 | lwz r1,0(r2) ; stw r1,0(r2) | lwsync ; sync | lwz r3,0(r2) ; li r3,1 | xor r4,r3,r3 ; stw r3,0(r4) | lwzx r5,r4,r6 ; exists (1:r1=1 /\ 1:r3=1 /\ 1:r5=0) Generated assembler _litmus_P1_0_: lwz 27,0(11) _litmus_P1_1_: lwsync _litmus_P1_2_: lwz 29,0(11) _litmus_P1_3_: xor 7,29,29 _litmus_P1_4_: lwzx 8,7,9 _litmus_P0_0_: li 5,1 _litmus_P0_1_: stw 5,0(11) _litmus_P0_2_: sync _litmus_P0_3_: li 4,1 _litmus_P0_4_: stw 4,0(9) Test aclwsrr007 Allowed Histogram (4 states) 2006 :>1:r1=0; 1:r3=1; 1:r5=1; 10860324:>1:r1=1; 1:r3=1; 1:r5=1; 5397465:>1:r1=0; 1:r3=0; 1:r5=1; 15740205:>1:r1=0; 1:r3=0; 1:r5=0; No Witnesses Positive: 0, Negative: 32000000 Condition exists (1:r1=1 /\ 1:r3=1 /\ 1:r5=0) is NOT validated Hash=305fbb356be2229e5144d5d1274ca77d Cycle=DpdR Fre SyncdWW Rfe LwSyncsRR Relax aclwsrr007 No ACLwSyncsRR Safe=Fre SyncdWW DpdR Time aclwsrr007 1.77 $Revision: 3163 $ Parameters #ifndef SIZE_OF_TEST #define SIZE_OF_TEST 100000 #endif #ifndef NUMBER_OF_RUN #define NUMBER_OF_RUN 10 #endif #ifndef N_EXE #define N_EXE (64 < N ? 1 : 64 / N) #endif /* gcc options: -Wall -std=gnu99 -O -pthread -maix64 */ /* barrier: user */ /* tread start/join: changing */ /* memory: indirect */ /* safer: false */ /* preload: true */ /* para: self */ /* changes: false */ /* speedcheck: false */ /* proc used: 64 */ GCCOPTS="-Wall -std=gnu99 -O -pthread -maix64" LITMUSOPTS= Thu Dec 24 10:43:10 NFT 2009