PPC aclwsrr002 "DpdR Fre Rfe LwSyncsRR DpdR Fre Rfe LwSyncsRR" Cycle=DpdR Fre Rfe LwSyncsRR DpdR Fre Rfe LwSyncsRR Relax=ACLwSyncsRR Safe=Fre DpdR { 0:r2=x; 0:r6=y; 1:r2=y; 2:r2=y; 2:r6=x; 3:r2=x; } P0 | P1 | P2 | P3 ; lwz r1,0(r2) | li r1,1 | lwz r1,0(r2) | li r1,1 ; lwsync | stw r1,0(r2) | lwsync | stw r1,0(r2) ; lwz r3,0(r2) | | lwz r3,0(r2) | ; xor r4,r3,r3 | | xor r4,r3,r3 | ; lwzx r5,r4,r6 | | lwzx r5,r4,r6 | ; exists (0:r1=1 /\ 0:r3=1 /\ 0:r5=0 /\ 2:r1=1 /\ 2:r3=1 /\ 2:r5=0)