Raw log

Sat Dec 26 12:39:23 CET 2009 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for ./src/podrw000.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC podrw000 "Wse SyncdWW Rfe PodRW" {0:r2=y; 0:r4=x; 1:r2=x; 1:r4=y;} P0 | P1 ; li r1,2 | lwz r1,0(r2) ; stw r1,0(r2) | li r3,1 ; sync | stw r3,0(r4) ; li r3,1 | ; stw r3,0(r4) | ; exists (y=2 /\ 1:r1=1) Generated assembler _litmus_P0_0_: li r4,2 _litmus_P0_1_: stw r4,0(r9) _litmus_P0_2_: sync _litmus_P0_3_: li r3,1 _litmus_P0_4_: stw r3,0(r2) _litmus_P1_0_: lwz r3,0(r9) _litmus_P1_1_: li r30,1 _litmus_P1_2_: stw r30,0(r2) Test podrw000 Allowed Histogram (3 states) 6176783:>1:r1=1; y=1; 39721803:>1:r1=0; y=2; 34101414:>1:r1=0; y=1; No Witnesses Positive: 0, Negative: 80000000 Condition exists (y=2 /\ 1:r1=1) is NOT validated Hash=cdbca6b42640c1c580bfff55409bff0a Cycle=Wse SyncdWW Rfe PodRW Relax podrw000 No PodRW Safe=Wse BCSyncdWW Time podrw000 34.05 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for ./src/podrw001.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC podrw001 "Wse SyncdWW Rfe PodRW Wse SyncdWW Rfe PodRW" {0:r2=a; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z; 3:r2=z; 3:r4=a;} P0 | P1 | P2 | P3 ; li r1,2 | lwz r1,0(r2) | li r1,2 | lwz r1,0(r2) ; stw r1,0(r2) | li r3,1 | stw r1,0(r2) | li r3,1 ; sync | stw r3,0(r4) | sync | stw r3,0(r4) ; li r3,1 | | li r3,1 | ; stw r3,0(r4) | | stw r3,0(r4) | ; exists (a=2 /\ y=2 /\ 1:r1=1 /\ 3:r1=1) Generated assembler _litmus_P0_0_: li r30,2 _litmus_P0_1_: stw r30,0(r9) _litmus_P0_2_: sync _litmus_P0_3_: li r3,1 _litmus_P0_4_: stw r3,0(r2) _litmus_P1_0_: lwz r29,0(r9) _litmus_P1_1_: li r30,1 _litmus_P1_2_: stw r30,0(r2) _litmus_P2_0_: li r4,2 _litmus_P2_1_: stw r4,0(r9) _litmus_P2_2_: sync _litmus_P2_3_: li r3,1 _litmus_P2_4_: stw r3,0(r2) _litmus_P3_0_: lwz r3,0(r9) _litmus_P3_1_: li r30,1 _litmus_P3_2_: stw r30,0(r2) Test podrw001 Allowed Histogram (15 states) 179 :>1:r1=1; 3:r1=1; a=1; y=2; 2816 :>1:r1=0; 3:r1=1; a=2; y=2; 340 :>1:r1=1; 3:r1=1; a=2; y=1; 3942 :>1:r1=1; 3:r1=0; a=2; y=2; 288283:>1:r1=1; 3:r1=0; a=1; y=2; 285462:>1:r1=0; 3:r1=1; a=2; y=1; 379932:>1:r1=0; 3:r1=1; a=1; y=2; 533998:>1:r1=1; 3:r1=0; a=2; y=1; 5375430:>1:r1=0; 3:r1=0; a=2; y=2; 6426446:>1:r1=1; 3:r1=0; a=1; y=1; 3929386:>1:r1=0; 3:r1=0; a=1; y=1; 7845861:>1:r1=0; 3:r1=0; a=1; y=2; 8969840:>1:r1=0; 3:r1=0; a=2; y=1; 928846:>1:r1=1; 3:r1=1; a=1; y=1; 5029239:>1:r1=0; 3:r1=1; a=1; y=1; No Witnesses Positive: 0, Negative: 40000000 Condition exists (a=2 /\ y=2 /\ 1:r1=1 /\ 3:r1=1) is NOT validated Hash=1bf24e0898e097d6dee5319da0f77d12 Cycle=Wse SyncdWW Rfe PodRW Wse SyncdWW Rfe PodRW Relax podrw001 No PodRW Safe=Wse BCSyncdWW Time podrw001 64.02 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for ./src/podrw002.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC podrw002 "Wse SyncdWW Rfe SyncdRW Rfe PodRW" {0:r2=z; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z;} P0 | P1 | P2 ; li r1,2 | lwz r1,0(r2) | lwz r1,0(r2) ; stw r1,0(r2) | sync | li r3,1 ; sync | li r3,1 | stw r3,0(r4) ; li r3,1 | stw r3,0(r4) | ; stw r3,0(r4) | | ; exists (z=2 /\ 1:r1=1 /\ 2:r1=1) Generated assembler _litmus_P0_0_: li r30,2 _litmus_P0_1_: stw r30,0(r9) _litmus_P0_2_: sync _litmus_P0_3_: li r3,1 _litmus_P0_4_: stw r3,0(r2) _litmus_P1_0_: lwz r27,0(r9) _litmus_P1_1_: sync _litmus_P1_2_: li r30,1 _litmus_P1_3_: stw r30,0(r2) _litmus_P2_0_: lwz r27,0(r9) _litmus_P2_1_: li r30,1 _litmus_P2_2_: stw r30,0(r2) Test podrw002 Allowed Histogram (7 states) 12772 :>1:r1=1; 2:r1=1; z=1; 8812426:>1:r1=0; 2:r1=1; z=1; 214820:>1:r1=0; 2:r1=1; z=2; 10315742:>1:r1=0; 2:r1=0; z=1; 13814238:>1:r1=0; 2:r1=0; z=2; 6694092:>1:r1=1; 2:r1=0; z=1; 135910:>1:r1=1; 2:r1=0; z=2; No Witnesses Positive: 0, Negative: 40000000 Condition exists (z=2 /\ 1:r1=1 /\ 2:r1=1) is NOT validated Hash=63fda5260d684056b54f65990cd3e6c9 Cycle=Wse SyncdWW Rfe SyncdRW Rfe PodRW Relax podrw002 No PodRW Safe=Wse BCSyncdWW BCSyncdRW Time podrw002 43.03 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for ./src/podrw003.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC podrw003 "Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe PodRW" {0:r2=a; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z; 3:r2=z; 3:r4=a;} P0 | P1 | P2 | P3 ; li r1,2 | lwz r1,0(r2) | lwz r1,0(r2) | lwz r1,0(r2) ; stw r1,0(r2) | sync | sync | li r3,1 ; sync | li r3,1 | li r3,1 | stw r3,0(r4) ; li r3,1 | stw r3,0(r4) | stw r3,0(r4) | ; stw r3,0(r4) | | | ; exists (a=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1) Generated assembler _litmus_P0_0_: li r30,2 _litmus_P0_1_: stw r30,0(r9) _litmus_P0_2_: sync _litmus_P0_3_: li r3,1 _litmus_P0_4_: stw r3,0(r2) _litmus_P1_0_: lwz r29,0(r9) _litmus_P1_1_: sync _litmus_P1_2_: li r30,1 _litmus_P1_3_: stw r30,0(r2) _litmus_P2_0_: lwz r3,0(r9) _litmus_P2_1_: sync _litmus_P2_2_: li r30,1 _litmus_P2_3_: stw r30,0(r2) _litmus_P3_0_: lwz r3,0(r9) _litmus_P3_1_: li r30,1 _litmus_P3_2_: stw r30,0(r2) Test podrw003 Allowed Histogram (15 states) 304 :>1:r1=0; 2:r1=1; 3:r1=1; a=2; 26 :>1:r1=1; 2:r1=1; 3:r1=1; a=1; 53403 :>1:r1=0; 2:r1=1; 3:r1=1; a=1; 471213:>1:r1=0; 2:r1=0; 3:r1=1; a=2; 657 :>1:r1=1; 2:r1=1; 3:r1=0; a=2; 45565 :>1:r1=1; 2:r1=1; 3:r1=0; a=1; 366492:>1:r1=1; 2:r1=0; 3:r1=0; a=2; 4961358:>1:r1=1; 2:r1=0; 3:r1=0; a=1; 2994965:>1:r1=0; 2:r1=1; 3:r1=0; a=2; 4710467:>1:r1=0; 2:r1=1; 3:r1=0; a=1; 6830362:>1:r1=0; 2:r1=0; 3:r1=1; a=1; 7243345:>1:r1=0; 2:r1=0; 3:r1=0; a=1; 11664214:>1:r1=0; 2:r1=0; 3:r1=0; a=2; 656997:>1:r1=1; 2:r1=0; 3:r1=1; a=1; 632 :>1:r1=1; 2:r1=0; 3:r1=1; a=2; No Witnesses Positive: 0, Negative: 40000000 Condition exists (a=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1) is NOT validated Hash=3ecc0c0abdbd62deb73054a63399a7c3 Cycle=Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe PodRW Relax podrw003 No PodRW Safe=Wse BCSyncdWW BCSyncdRW Time podrw003 58.57 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for ./src/podrw004.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC podrw004 "Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe SyncdRW Rfe PodRW" {0:r2=b; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z; 3:r2=z; 3:r4=a; 4:r2=a; 4:r4=b;} P0 | P1 | P2 | P3 | P4 ; li r1,2 | lwz r1,0(r2) | lwz r1,0(r2) | lwz r1,0(r2) | lwz r1,0(r2) ; stw r1,0(r2) | sync | sync | sync | li r3,1 ; sync | li r3,1 | li r3,1 | li r3,1 | stw r3,0(r4) ; li r3,1 | stw r3,0(r4) | stw r3,0(r4) | stw r3,0(r4) | ; stw r3,0(r4) | | | | ; exists (b=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1 /\ 4:r1=1) Generated assembler _litmus_P0_0_: li r30,2 _litmus_P0_1_: stw r30,0(r9) _litmus_P0_2_: sync _litmus_P0_3_: li r29,1 _litmus_P0_4_: stw r29,0(r2) _litmus_P1_0_: lwz r27,0(r9) _litmus_P1_1_: sync _litmus_P1_2_: li r30,1 _litmus_P1_3_: stw r30,0(r2) _litmus_P2_0_: lwz r27,0(r9) _litmus_P2_1_: sync _litmus_P2_2_: li r30,1 _litmus_P2_3_: stw r30,0(r2) _litmus_P3_0_: lwz r27,0(r9) _litmus_P3_1_: sync _litmus_P3_2_: li r30,1 _litmus_P3_3_: stw r30,0(r2) _litmus_P4_0_: lwz r27,0(r9) _litmus_P4_1_: li r30,1 _litmus_P4_2_: stw r30,0(r2) Test podrw004 Allowed Histogram (31 states) 207 :>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=0; b=1; 88 :>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=1; b=2; 77 :>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=1; b=2; 60 :>1:r1=1; 2:r1=1; 3:r1=1; 4:r1=1; b=1; 160 :>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=1; b=2; 867 :>1:r1=1; 2:r1=1; 3:r1=1; 4:r1=0; b=2; 5195 :>1:r1=1; 2:r1=1; 3:r1=1; 4:r1=0; b=1; 17173 :>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=1; b=1; 10307 :>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=1; b=2; 11805 :>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=1; b=2; 29289 :>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=1; b=1; 150270:>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=0; b=2; 487451:>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=0; b=1; 68645 :>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=0; b=2; 729812:>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=0; b=1; 193056:>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=0; b=2; 56758 :>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=1; b=2; 2305238:>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=0; b=2; 41805 :>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=1; b=1; 5731526:>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=0; b=2; 638313:>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=1; b=2; 4895221:>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=0; b=1; 2681145:>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=0; b=2; 4923532:>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=0; b=1; 1802431:>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=0; b=2; 614955:>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=1; b=1; 5858743:>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=1; b=1; 1090635:>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=0; b=1; 1518283:>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=1; b=1; 4800010:>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=0; b=1; 1336943:>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=1; b=1; No Witnesses Positive: 0, Negative: 40000000 Condition exists (b=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1 /\ 4:r1=1) is NOT validated Hash=0a5d1f6d4d1fe8e45903c66be35a69dd Cycle=Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe SyncdRW Rfe PodRW Relax podrw004 No PodRW Safe=Wse BCSyncdWW BCSyncdRW Time podrw004 95822.37 $Revision: 3163 $ Parameters #ifndef SIZE_OF_TEST #define SIZE_OF_TEST 1000000 #endif #ifndef NUMBER_OF_RUN #define NUMBER_OF_RUN 1 #endif #ifndef N_EXE #define N_EXE (4 < N ? 1 : 4 / N) #endif /* gcc options: -Wall -std=gnu99 -O */ /* barrier: user */ /* tread start/join: changing */ /* memory: indirect */ /* safer: false */ /* preload: true */ /* para: self */ /* changes: false */ /* speedcheck: false */ /* proc used: 4 */ GCCOPTS="-Wall -std=gnu99 -O" LITMUSOPTS=-r 40 -v Sun Dec 27 15:19:46 CET 2009