Raw log

Thu Dec 24 09:40:31 CET 2009 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for ./src/podrw000.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC podrw000 "Wse SyncdWW Rfe PodRW" {0:r2=y; 0:r4=x; 1:r2=x; 1:r4=y;} P0 | P1 ; li r1,2 | lwz r1,0(r2) ; stw r1,0(r2) | li r3,1 ; sync | stw r3,0(r4) ; li r3,1 | ; stw r3,0(r4) | ; exists (y=2 /\ 1:r1=1) Generated assembler _litmus_P0_0_: li r11,2 _litmus_P0_1_: stw r11,0(r9) _litmus_P0_2_: sync _litmus_P0_3_: li r10,1 _litmus_P0_4_: stw r10,0(r2) _litmus_P1_0_: lwz r8,0(r9) _litmus_P1_1_: li r10,1 _litmus_P1_2_: stw r10,0(r2) Test podrw000 Allowed Histogram (3 states) 2529157:>1:r1=1; y=1; 18407231:>1:r1=0; y=2; 19063612:>1:r1=0; y=1; No Witnesses Positive: 0, Negative: 40000000 Condition exists (y=2 /\ 1:r1=1) is NOT validated Hash=cdbca6b42640c1c580bfff55409bff0a Cycle=Wse SyncdWW Rfe PodRW Relax podrw000 No PodRW Safe=Wse BCSyncdWW Time podrw000 22.71 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for ./src/podrw001.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC podrw001 "Wse SyncdWW Rfe PodRW Wse SyncdWW Rfe PodRW" {0:r2=a; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z; 3:r2=z; 3:r4=a;} P0 | P1 | P2 | P3 ; li r1,2 | lwz r1,0(r2) | li r1,2 | lwz r1,0(r2) ; stw r1,0(r2) | li r3,1 | stw r1,0(r2) | li r3,1 ; sync | stw r3,0(r4) | sync | stw r3,0(r4) ; li r3,1 | | li r3,1 | ; stw r3,0(r4) | | stw r3,0(r4) | ; exists (a=2 /\ y=2 /\ 1:r1=1 /\ 3:r1=1) Generated assembler _litmus_P0_0_: li r11,2 _litmus_P0_1_: stw r11,0(r9) _litmus_P0_2_: sync _litmus_P0_3_: li r10,1 _litmus_P0_4_: stw r10,0(r2) _litmus_P1_0_: lwz r8,0(r9) _litmus_P1_1_: li r10,1 _litmus_P1_2_: stw r10,0(r2) _litmus_P2_0_: li r11,2 _litmus_P2_1_: stw r11,0(r9) _litmus_P2_2_: sync _litmus_P2_3_: li r10,1 _litmus_P2_4_: stw r10,0(r2) _litmus_P3_0_: lwz r8,0(r9) _litmus_P3_1_: li r10,1 _litmus_P3_2_: stw r10,0(r2) Test podrw001 Allowed Histogram (15 states) 179 :>1:r1=1; 3:r1=1; a=2; y=1; 302 :>1:r1=1; 3:r1=1; a=1; y=2; 2093 :>1:r1=0; 3:r1=1; a=2; y=2; 1384 :>1:r1=1; 3:r1=0; a=2; y=2; 217838:>1:r1=0; 3:r1=1; a=2; y=1; 268093:>1:r1=0; 3:r1=1; a=1; y=2; 174553:>1:r1=1; 3:r1=0; a=1; y=2; 2860287:>1:r1=0; 3:r1=1; a=1; y=1; 2972260:>1:r1=1; 3:r1=0; a=1; y=1; 2709292:>1:r1=0; 3:r1=0; a=2; y=2; 1542714:>1:r1=0; 3:r1=0; a=1; y=1; 4482782:>1:r1=0; 3:r1=0; a=2; y=1; 4184724:>1:r1=0; 3:r1=0; a=1; y=2; 174412:>1:r1=1; 3:r1=0; a=2; y=1; 409087:>1:r1=1; 3:r1=1; a=1; y=1; No Witnesses Positive: 0, Negative: 20000000 Condition exists (a=2 /\ y=2 /\ 1:r1=1 /\ 3:r1=1) is NOT validated Hash=1bf24e0898e097d6dee5319da0f77d12 Cycle=Wse SyncdWW Rfe PodRW Wse SyncdWW Rfe PodRW Relax podrw001 No PodRW Safe=Wse BCSyncdWW Time podrw001 43.17 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for ./src/podrw002.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC podrw002 "Wse SyncdWW Rfe SyncdRW Rfe PodRW" {0:r2=z; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z;} P0 | P1 | P2 ; li r1,2 | lwz r1,0(r2) | lwz r1,0(r2) ; stw r1,0(r2) | sync | li r3,1 ; sync | li r3,1 | stw r3,0(r4) ; li r3,1 | stw r3,0(r4) | ; stw r3,0(r4) | | ; exists (z=2 /\ 1:r1=1 /\ 2:r1=1) Generated assembler _litmus_P0_0_: li r10,2 _litmus_P0_1_: stw r10,0(r9) _litmus_P0_2_: sync _litmus_P0_3_: li r11,1 _litmus_P0_4_: stw r11,0(r2) _litmus_P1_0_: lwz r10,0(r9) _litmus_P1_1_: sync _litmus_P1_2_: li r8,1 _litmus_P1_3_: stw r8,0(r2) _litmus_P2_0_: lwz r10,0(r9) _litmus_P2_1_: li r8,1 _litmus_P2_2_: stw r8,0(r2) Test podrw002 Allowed Histogram (7 states) 10108 :>1:r1=1; 2:r1=1; z=1; 129459:>1:r1=0; 2:r1=1; z=2; 34175 :>1:r1=1; 2:r1=0; z=2; 3608929:>1:r1=0; 2:r1=1; z=1; 6848171:>1:r1=0; 2:r1=0; z=2; 2936679:>1:r1=1; 2:r1=0; z=1; 6432479:>1:r1=0; 2:r1=0; z=1; No Witnesses Positive: 0, Negative: 20000000 Condition exists (z=2 /\ 1:r1=1 /\ 2:r1=1) is NOT validated Hash=63fda5260d684056b54f65990cd3e6c9 Cycle=Wse SyncdWW Rfe SyncdRW Rfe PodRW Relax podrw002 No PodRW Safe=Wse BCSyncdWW BCSyncdRW Time podrw002 29.89 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for ./src/podrw003.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC podrw003 "Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe PodRW" {0:r2=a; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z; 3:r2=z; 3:r4=a;} P0 | P1 | P2 | P3 ; li r1,2 | lwz r1,0(r2) | lwz r1,0(r2) | lwz r1,0(r2) ; stw r1,0(r2) | sync | sync | li r3,1 ; sync | li r3,1 | li r3,1 | stw r3,0(r4) ; li r3,1 | stw r3,0(r4) | stw r3,0(r4) | ; stw r3,0(r4) | | | ; exists (a=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1) Generated assembler _litmus_P0_0_: li r11,2 _litmus_P0_1_: stw r11,0(r9) _litmus_P0_2_: sync _litmus_P0_3_: li r10,1 _litmus_P0_4_: stw r10,0(r2) _litmus_P1_0_: lwz r8,0(r9) _litmus_P1_1_: sync _litmus_P1_2_: li r10,1 _litmus_P1_3_: stw r10,0(r2) _litmus_P2_0_: lwz r8,0(r9) _litmus_P2_1_: sync _litmus_P2_2_: li r10,1 _litmus_P2_3_: stw r10,0(r2) _litmus_P3_0_: lwz r8,0(r9) _litmus_P3_1_: li r10,1 _litmus_P3_2_: stw r10,0(r2) Test podrw003 Allowed Histogram (15 states) 280 :>1:r1=0; 2:r1=1; 3:r1=1; a=2; 543 :>1:r1=1; 2:r1=0; 3:r1=1; a=2; 34882 :>1:r1=0; 2:r1=1; 3:r1=1; a=1; 207 :>1:r1=1; 2:r1=1; 3:r1=0; a=2; 21354 :>1:r1=1; 2:r1=1; 3:r1=0; a=1; 198 :>1:r1=1; 2:r1=1; 3:r1=1; a=1; 391122:>1:r1=0; 2:r1=0; 3:r1=1; a=2; 2619170:>1:r1=0; 2:r1=1; 3:r1=0; a=1; 1319011:>1:r1=0; 2:r1=1; 3:r1=0; a=2; 2805826:>1:r1=1; 2:r1=0; 3:r1=0; a=1; 5808175:>1:r1=0; 2:r1=0; 3:r1=0; a=2; 3311129:>1:r1=0; 2:r1=0; 3:r1=1; a=1; 3081207:>1:r1=0; 2:r1=0; 3:r1=0; a=1; 142377:>1:r1=1; 2:r1=0; 3:r1=0; a=2; 464519:>1:r1=1; 2:r1=0; 3:r1=1; a=1; No Witnesses Positive: 0, Negative: 20000000 Condition exists (a=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1) is NOT validated Hash=3ecc0c0abdbd62deb73054a63399a7c3 Cycle=Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe PodRW Relax podrw003 No PodRW Safe=Wse BCSyncdWW BCSyncdRW Time podrw003 41.69 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % Results for ./src/podrw004.litmus % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% PPC podrw004 "Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe SyncdRW Rfe PodRW" {0:r2=b; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z; 3:r2=z; 3:r4=a; 4:r2=a; 4:r4=b;} P0 | P1 | P2 | P3 | P4 ; li r1,2 | lwz r1,0(r2) | lwz r1,0(r2) | lwz r1,0(r2) | lwz r1,0(r2) ; stw r1,0(r2) | sync | sync | sync | li r3,1 ; sync | li r3,1 | li r3,1 | li r3,1 | stw r3,0(r4) ; li r3,1 | stw r3,0(r4) | stw r3,0(r4) | stw r3,0(r4) | ; stw r3,0(r4) | | | | ; exists (b=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1 /\ 4:r1=1) Generated assembler _litmus_P0_0_: li r10,2 _litmus_P0_1_: stw r10,0(r9) _litmus_P0_2_: sync _litmus_P0_3_: li r11,1 _litmus_P0_4_: stw r11,0(r2) _litmus_P1_0_: lwz r10,0(r9) _litmus_P1_1_: sync _litmus_P1_2_: li r8,1 _litmus_P1_3_: stw r8,0(r2) _litmus_P2_0_: lwz r10,0(r9) _litmus_P2_1_: sync _litmus_P2_2_: li r8,1 _litmus_P2_3_: stw r8,0(r2) _litmus_P3_0_: lwz r10,0(r9) _litmus_P3_1_: sync _litmus_P3_2_: li r8,1 _litmus_P3_3_: stw r8,0(r2) _litmus_P4_0_: lwz r10,0(r9) _litmus_P4_1_: li r8,1 _litmus_P4_2_: stw r8,0(r2) Test podrw004 Allowed Histogram (31 states) 74 :>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=0; b=1; 87 :>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=1; b=2; 54 :>1:r1=1; 2:r1=1; 3:r1=1; 4:r1=1; b=1; 452 :>1:r1=1; 2:r1=1; 3:r1=1; 4:r1=0; b=2; 194 :>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=1; b=2; 150 :>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=1; b=2; 13640 :>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=1; b=2; 106598:>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=0; b=2; 274839:>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=0; b=1; 3486 :>1:r1=1; 2:r1=1; 3:r1=1; 4:r1=0; b=1; 46410 :>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=0; b=2; 26170 :>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=1; b=1; 18374 :>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=1; b=2; 144937:>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=0; b=2; 34319 :>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=1; b=1; 524022:>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=1; b=2; 680710:>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=0; b=1; 2124643:>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=0; b=1; 353506:>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=0; b=1; 1678326:>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=0; b=1; 52536 :>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=1; b=2; 1630866:>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=0; b=2; 895127:>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=1; b=1; 1677045:>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=0; b=2; 2425273:>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=0; b=2; 1267326:>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=0; b=2; 2694112:>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=1; b=1; 509446:>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=1; b=1; 1944461:>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=0; b=1; 862614:>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=1; b=1; 10203 :>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=1; b=1; No Witnesses Positive: 0, Negative: 20000000 Condition exists (b=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1 /\ 4:r1=1) is NOT validated Hash=0a5d1f6d4d1fe8e45903c66be35a69dd Cycle=Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe SyncdRW Rfe PodRW Relax podrw004 No PodRW Safe=Wse BCSyncdWW BCSyncdRW Time podrw004 47885.11 $Revision: 3163 $ Parameters #ifndef SIZE_OF_TEST #define SIZE_OF_TEST 1000000 #endif #ifndef NUMBER_OF_RUN #define NUMBER_OF_RUN 1 #endif #ifndef N_EXE #define N_EXE (4 < N ? 1 : 4 / N) #endif /* gcc options: -Wall -std=gnu99 */ /* barrier: user */ /* tread start/join: changing */ /* memory: indirect */ /* safer: false */ /* preload: true */ /* para: self */ /* changes: false */ /* speedcheck: false */ /* proc used: 4 */ GCCOPTS="-Wall -std=gnu99 " LITMUSOPTS=-r 20 Thu Dec 24 23:00:54 CET 2009