Wed Dec 23 18:17:36 CET 2009
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Results for src/podrw000.litmus %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
PPC
podrw000
"Wse SyncdWW Rfe PodRW"
{0:r2=y; 0:r4=x; 1:r2=x; 1:r4=y;}
P0 | P1 ;
li r1,2 | lwz r1,0(r2) ;
stw r1,0(r2) | li r3,1 ;
sync | stw r3,0(r4) ;
li r3,1 | ;
stw r3,0(r4) | ;
exists (y=2 /\ 1:r1=1)
Generated assembler
_litmus_P0_0_: li r11,2
_litmus_P0_1_: stw r11,0(r9)
_litmus_P0_2_: sync
_litmus_P0_3_: li r10,1
_litmus_P0_4_: stw r10,0(r2)
_litmus_P1_0_: lwz r8,0(r9)
_litmus_P1_1_: li r10,1
_litmus_P1_2_: stw r10,0(r2)
Test podrw000 Allowed
Histogram (3 states)
906708:>1:r1=0; y=2;
102070:>1:r1=1; y=1;
991222:>1:r1=0; y=1;
No
Witnesses
Positive: 0, Negative: 2000000
Condition exists (y=2 /\ 1:r1=1) is NOT validated
Hash=cdbca6b42640c1c580bfff55409bff0a
Cycle=Wse SyncdWW Rfe PodRW
Relax podrw000 No PodRW
Safe=Wse BCSyncdWW
Time podrw000 1.21
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Results for src/podrw001.litmus %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
PPC
podrw001
"Wse SyncdWW Rfe PodRW Wse SyncdWW Rfe PodRW"
{0:r2=a; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z; 3:r2=z; 3:r4=a;}
P0 | P1 | P2 | P3 ;
li r1,2 | lwz r1,0(r2) | li r1,2 | lwz r1,0(r2) ;
stw r1,0(r2) | li r3,1 | stw r1,0(r2) | li r3,1 ;
sync | stw r3,0(r4) | sync | stw r3,0(r4) ;
li r3,1 | | li r3,1 | ;
stw r3,0(r4) | | stw r3,0(r4) | ;
exists (a=2 /\ y=2 /\ 1:r1=1 /\ 3:r1=1)
Generated assembler
_litmus_P0_0_: li r11,2
_litmus_P0_1_: stw r11,0(r9)
_litmus_P0_2_: sync
_litmus_P0_3_: li r10,1
_litmus_P0_4_: stw r10,0(r2)
_litmus_P1_0_: lwz r8,0(r9)
_litmus_P1_1_: li r10,1
_litmus_P1_2_: stw r10,0(r2)
_litmus_P2_0_: li r11,2
_litmus_P2_1_: stw r11,0(r9)
_litmus_P2_2_: sync
_litmus_P2_3_: li r10,1
_litmus_P2_4_: stw r10,0(r2)
_litmus_P3_0_: lwz r8,0(r9)
_litmus_P3_1_: li r10,1
_litmus_P3_2_: stw r10,0(r2)
Test podrw001 Allowed
Histogram (15 states)
2 :>1:r1=1; 3:r1=1; a=1; y=2;
5 :>1:r1=1; 3:r1=1; a=2; y=1;
171 :>1:r1=1; 3:r1=0; a=2; y=2;
24 :>1:r1=0; 3:r1=1; a=2; y=2;
12530 :>1:r1=0; 3:r1=1; a=1; y=2;
10181 :>1:r1=1; 3:r1=0; a=1; y=2;
15584 :>1:r1=0; 3:r1=1; a=2; y=1;
185042:>1:r1=0; 3:r1=0; a=2; y=2;
185662:>1:r1=0; 3:r1=0; a=2; y=1;
133985:>1:r1=1; 3:r1=0; a=1; y=1;
53142 :>1:r1=0; 3:r1=0; a=1; y=1;
211334:>1:r1=0; 3:r1=0; a=1; y=2;
14285 :>1:r1=1; 3:r1=0; a=2; y=1;
6546 :>1:r1=1; 3:r1=1; a=1; y=1;
171507:>1:r1=0; 3:r1=1; a=1; y=1;
No
Witnesses
Positive: 0, Negative: 1000000
Condition exists (a=2 /\ y=2 /\ 1:r1=1 /\ 3:r1=1) is NOT validated
Hash=1bf24e0898e097d6dee5319da0f77d12
Cycle=Wse SyncdWW Rfe PodRW Wse SyncdWW Rfe PodRW
Relax podrw001 No PodRW
Safe=Wse BCSyncdWW
Time podrw001 2.19
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Results for src/podrw002.litmus %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
PPC
podrw002
"Wse SyncdWW Rfe SyncdRW Rfe PodRW"
{0:r2=z; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z;}
P0 | P1 | P2 ;
li r1,2 | lwz r1,0(r2) | lwz r1,0(r2) ;
stw r1,0(r2) | sync | li r3,1 ;
sync | li r3,1 | stw r3,0(r4) ;
li r3,1 | stw r3,0(r4) | ;
stw r3,0(r4) | | ;
exists (z=2 /\ 1:r1=1 /\ 2:r1=1)
Generated assembler
_litmus_P0_0_: li r10,2
_litmus_P0_1_: stw r10,0(r9)
_litmus_P0_2_: sync
_litmus_P0_3_: li r11,1
_litmus_P0_4_: stw r11,0(r2)
_litmus_P1_0_: lwz r10,0(r9)
_litmus_P1_1_: sync
_litmus_P1_2_: li r8,1
_litmus_P1_3_: stw r8,0(r2)
_litmus_P2_0_: lwz r10,0(r9)
_litmus_P2_1_: li r8,1
_litmus_P2_2_: stw r8,0(r2)
Test podrw002 Allowed
Histogram (7 states)
312 :>1:r1=1; 2:r1=1; z=1;
750 :>1:r1=1; 2:r1=0; z=2;
3865 :>1:r1=0; 2:r1=1; z=2;
159890:>1:r1=0; 2:r1=1; z=1;
365592:>1:r1=0; 2:r1=0; z=2;
162582:>1:r1=1; 2:r1=0; z=1;
307009:>1:r1=0; 2:r1=0; z=1;
No
Witnesses
Positive: 0, Negative: 1000000
Condition exists (z=2 /\ 1:r1=1 /\ 2:r1=1) is NOT validated
Hash=63fda5260d684056b54f65990cd3e6c9
Cycle=Wse SyncdWW Rfe SyncdRW Rfe PodRW
Relax podrw002 No PodRW
Safe=Wse BCSyncdWW BCSyncdRW
Time podrw002 1.58
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Results for src/podrw003.litmus %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
PPC
podrw003
"Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe PodRW"
{0:r2=a; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z; 3:r2=z; 3:r4=a;}
P0 | P1 | P2 | P3 ;
li r1,2 | lwz r1,0(r2) | lwz r1,0(r2) | lwz r1,0(r2) ;
stw r1,0(r2) | sync | sync | li r3,1 ;
sync | li r3,1 | li r3,1 | stw r3,0(r4) ;
li r3,1 | stw r3,0(r4) | stw r3,0(r4) | ;
stw r3,0(r4) | | | ;
exists (a=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1)
Generated assembler
_litmus_P0_0_: li r11,2
_litmus_P0_1_: stw r11,0(r9)
_litmus_P0_2_: sync
_litmus_P0_3_: li r10,1
_litmus_P0_4_: stw r10,0(r2)
_litmus_P1_0_: lwz r8,0(r9)
_litmus_P1_1_: sync
_litmus_P1_2_: li r10,1
_litmus_P1_3_: stw r10,0(r2)
_litmus_P2_0_: lwz r8,0(r9)
_litmus_P2_1_: sync
_litmus_P2_2_: li r10,1
_litmus_P2_3_: stw r10,0(r2)
_litmus_P3_0_: lwz r8,0(r9)
_litmus_P3_1_: li r10,1
_litmus_P3_2_: stw r10,0(r2)
Test podrw003 Allowed
Histogram (15 states)
6 :>1:r1=0; 2:r1=1; 3:r1=1; a=2;
4 :>1:r1=1; 2:r1=0; 3:r1=1; a=2;
33 :>1:r1=1; 2:r1=1; 3:r1=1; a=1;
430 :>1:r1=1; 2:r1=1; 3:r1=0; a=2;
4450 :>1:r1=1; 2:r1=1; 3:r1=0; a=1;
2764 :>1:r1=0; 2:r1=1; 3:r1=1; a=1;
12426 :>1:r1=1; 2:r1=0; 3:r1=0; a=2;
25732 :>1:r1=0; 2:r1=0; 3:r1=1; a=2;
119930:>1:r1=1; 2:r1=0; 3:r1=0; a=1;
167900:>1:r1=0; 2:r1=1; 3:r1=0; a=1;
177888:>1:r1=0; 2:r1=0; 3:r1=1; a=1;
53799 :>1:r1=0; 2:r1=1; 3:r1=0; a=2;
156328:>1:r1=0; 2:r1=0; 3:r1=0; a=1;
254946:>1:r1=0; 2:r1=0; 3:r1=0; a=2;
23364 :>1:r1=1; 2:r1=0; 3:r1=1; a=1;
No
Witnesses
Positive: 0, Negative: 1000000
Condition exists (a=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1) is NOT validated
Hash=3ecc0c0abdbd62deb73054a63399a7c3
Cycle=Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe PodRW
Relax podrw003 No PodRW
Safe=Wse BCSyncdWW BCSyncdRW
Time podrw003 2.23
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Results for src/podrw004.litmus %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
PPC
podrw004
"Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe SyncdRW Rfe PodRW"
{0:r2=b; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z; 3:r2=z; 3:r4=a; 4:r2=a; 4:r4=b;}
P0 | P1 | P2 | P3 | P4 ;
li r1,2 | lwz r1,0(r2) | lwz r1,0(r2) | lwz r1,0(r2) | lwz r1,0(r2) ;
stw r1,0(r2) | sync | sync | sync | li r3,1 ;
sync | li r3,1 | li r3,1 | li r3,1 | stw r3,0(r4) ;
li r3,1 | stw r3,0(r4) | stw r3,0(r4) | stw r3,0(r4) | ;
stw r3,0(r4) | | | | ;
exists (b=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1 /\ 4:r1=1)
Generated assembler
_litmus_P0_0_: li r10,2
_litmus_P0_1_: stw r10,0(r9)
_litmus_P0_2_: sync
_litmus_P0_3_: li r11,1
_litmus_P0_4_: stw r11,0(r2)
_litmus_P1_0_: lwz r10,0(r9)
_litmus_P1_1_: sync
_litmus_P1_2_: li r8,1
_litmus_P1_3_: stw r8,0(r2)
_litmus_P2_0_: lwz r10,0(r9)
_litmus_P2_1_: sync
_litmus_P2_2_: li r8,1
_litmus_P2_3_: stw r8,0(r2)
_litmus_P3_0_: lwz r10,0(r9)
_litmus_P3_1_: sync
_litmus_P3_2_: li r8,1
_litmus_P3_3_: stw r8,0(r2)
_litmus_P4_0_: lwz r10,0(r9)
_litmus_P4_1_: li r8,1
_litmus_P4_2_: stw r8,0(r2)
Test podrw004 Allowed
Histogram (31 states)
12 :>1:r1=1; 2:r1=1; 3:r1=1; 4:r1=0; b=2;
5 :>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=1; b=2;
7 :>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=1; b=2;
7 :>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=0; b=1;
9 :>1:r1=1; 2:r1=1; 3:r1=1; 4:r1=1; b=1;
9 :>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=1; b=2;
159 :>1:r1=1; 2:r1=1; 3:r1=1; 4:r1=0; b=1;
1469 :>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=1; b=1;
714 :>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=1; b=2;
1781 :>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=1; b=2;
1278 :>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=1; b=1;
399 :>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=1; b=1;
4166 :>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=0; b=2;
817 :>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=1; b=2;
7824 :>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=0; b=1;
14386 :>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=1; b=2;
3309 :>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=0; b=2;
75928 :>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=0; b=2;
97067 :>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=0; b=2;
92361 :>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=0; b=1;
22167 :>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=1; b=1;
115928:>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=0; b=2;
4260 :>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=0; b=2;
143349:>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=1; b=1;
35423 :>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=1; b=1;
33888 :>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=0; b=1;
81530 :>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=0; b=2;
14662 :>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=0; b=1;
69850 :>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=0; b=1;
53128 :>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=1; b=1;
124108:>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=0; b=1;
No
Witnesses
Positive: 0, Negative: 1000000
Condition exists (b=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1 /\ 4:r1=1) is NOT validated
Hash=0a5d1f6d4d1fe8e45903c66be35a69dd
Cycle=Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe SyncdRW Rfe PodRW
Relax podrw004 No PodRW
Safe=Wse BCSyncdWW BCSyncdRW
Time podrw004 2375.04
$Revision: 3163 $
Parameters
#ifndef SIZE_OF_TEST
#define SIZE_OF_TEST 1000000
#endif
#ifndef NUMBER_OF_RUN
#define NUMBER_OF_RUN 1
#endif
#ifndef N_EXE
#define N_EXE (4 < N ? 1 : 4 / N)
#endif
/* gcc options: -Wall -std=gnu99 */
/* barrier: user */
/* tread start/join: changing */
/* memory: indirect */
/* safer: false */
/* preload: true */
/* para: self */
/* changes: false */
/* speedcheck: false */
/* proc used: 4 */
GCCOPTS="-Wall -std=gnu99 "
LITMUSOPTS=
Wed Dec 23 18:57:18 CET 2009