Tue Dec 22 18:02:12 CET 2009
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Results for src/podrw000.litmus %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
PPC
podrw000
"Wse SyncdWW Rfe PodRW"
{0:r2=y; 0:r4=x; 1:r2=x; 1:r4=y;}
P0 | P1 ;
li r1,2 | lwz r1,0(r2) ;
stw r1,0(r2) | li r3,1 ;
sync | stw r3,0(r4) ;
li r3,1 | ;
stw r3,0(r4) | ;
exists (y=2 /\ 1:r1=1)
Generated assembler
_litmus_P0_0_: li r11,2
_litmus_P0_1_: stw r11,0(r9)
_litmus_P0_2_: sync
_litmus_P0_3_: li r10,1
_litmus_P0_4_: stw r10,0(r2)
_litmus_P1_0_: lwz r8,0(r9)
_litmus_P1_1_: li r10,1
_litmus_P1_2_: stw r10,0(r2)
Test podrw000 Allowed
Histogram (3 states)
1934184:>1:r1=1; y=1;
18062306:>1:r1=0; y=2;
20003510:>1:r1=0; y=1;
No
Witnesses
Positive: 0, Negative: 40000000
Condition exists (y=2 /\ 1:r1=1) is NOT validated
Hash=cdbca6b42640c1c580bfff55409bff0a
Cycle=Wse SyncdWW Rfe PodRW
Relax podrw000 No PodRW
Safe=Wse BCSyncdWW
Time podrw000 22.90
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Results for src/podrw001.litmus %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
PPC
podrw001
"Wse SyncdWW Rfe PodRW Wse SyncdWW Rfe PodRW"
{0:r2=a; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z; 3:r2=z; 3:r4=a;}
P0 | P1 | P2 | P3 ;
li r1,2 | lwz r1,0(r2) | li r1,2 | lwz r1,0(r2) ;
stw r1,0(r2) | li r3,1 | stw r1,0(r2) | li r3,1 ;
sync | stw r3,0(r4) | sync | stw r3,0(r4) ;
li r3,1 | | li r3,1 | ;
stw r3,0(r4) | | stw r3,0(r4) | ;
exists (a=2 /\ y=2 /\ 1:r1=1 /\ 3:r1=1)
Generated assembler
_litmus_P0_0_: li r11,2
_litmus_P0_1_: stw r11,0(r9)
_litmus_P0_2_: sync
_litmus_P0_3_: li r10,1
_litmus_P0_4_: stw r10,0(r2)
_litmus_P1_0_: lwz r8,0(r9)
_litmus_P1_1_: li r10,1
_litmus_P1_2_: stw r10,0(r2)
_litmus_P2_0_: li r11,2
_litmus_P2_1_: stw r11,0(r9)
_litmus_P2_2_: sync
_litmus_P2_3_: li r10,1
_litmus_P2_4_: stw r10,0(r2)
_litmus_P3_0_: lwz r8,0(r9)
_litmus_P3_1_: li r10,1
_litmus_P3_2_: stw r10,0(r2)
Test podrw001 Allowed
Histogram (15 states)
1893 :>1:r1=0; 3:r1=1; a=2; y=2;
186 :>1:r1=1; 3:r1=1; a=1; y=2;
164 :>1:r1=1; 3:r1=1; a=2; y=1;
2362 :>1:r1=1; 3:r1=0; a=2; y=2;
267123:>1:r1=0; 3:r1=1; a=1; y=2;
189334:>1:r1=0; 3:r1=1; a=2; y=1;
162479:>1:r1=1; 3:r1=0; a=1; y=2;
262572:>1:r1=1; 3:r1=0; a=2; y=1;
3091865:>1:r1=1; 3:r1=0; a=1; y=1;
2620732:>1:r1=0; 3:r1=1; a=1; y=1;
2975843:>1:r1=0; 3:r1=0; a=2; y=2;
1640483:>1:r1=0; 3:r1=0; a=1; y=1;
3730872:>1:r1=0; 3:r1=0; a=1; y=2;
428158:>1:r1=1; 3:r1=1; a=1; y=1;
4625934:>1:r1=0; 3:r1=0; a=2; y=1;
No
Witnesses
Positive: 0, Negative: 20000000
Condition exists (a=2 /\ y=2 /\ 1:r1=1 /\ 3:r1=1) is NOT validated
Hash=1bf24e0898e097d6dee5319da0f77d12
Cycle=Wse SyncdWW Rfe PodRW Wse SyncdWW Rfe PodRW
Relax podrw001 No PodRW
Safe=Wse BCSyncdWW
Time podrw001 42.86
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Results for src/podrw002.litmus %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
PPC
podrw002
"Wse SyncdWW Rfe SyncdRW Rfe PodRW"
{0:r2=z; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z;}
P0 | P1 | P2 ;
li r1,2 | lwz r1,0(r2) | lwz r1,0(r2) ;
stw r1,0(r2) | sync | li r3,1 ;
sync | li r3,1 | stw r3,0(r4) ;
li r3,1 | stw r3,0(r4) | ;
stw r3,0(r4) | | ;
exists (z=2 /\ 1:r1=1 /\ 2:r1=1)
Generated assembler
_litmus_P0_0_: li r10,2
_litmus_P0_1_: stw r10,0(r9)
_litmus_P0_2_: sync
_litmus_P0_3_: li r11,1
_litmus_P0_4_: stw r11,0(r2)
_litmus_P1_0_: lwz r10,0(r9)
_litmus_P1_1_: sync
_litmus_P1_2_: li r8,1
_litmus_P1_3_: stw r8,0(r2)
_litmus_P2_0_: lwz r10,0(r9)
_litmus_P2_1_: li r8,1
_litmus_P2_2_: stw r8,0(r2)
Test podrw002 Allowed
Histogram (7 states)
37928 :>1:r1=1; 2:r1=0; z=2;
64474 :>1:r1=0; 2:r1=1; z=2;
2985505:>1:r1=1; 2:r1=0; z=1;
6452039:>1:r1=0; 2:r1=0; z=1;
3546720:>1:r1=0; 2:r1=1; z=1;
4936 :>1:r1=1; 2:r1=1; z=1;
6908398:>1:r1=0; 2:r1=0; z=2;
No
Witnesses
Positive: 0, Negative: 20000000
Condition exists (z=2 /\ 1:r1=1 /\ 2:r1=1) is NOT validated
Hash=63fda5260d684056b54f65990cd3e6c9
Cycle=Wse SyncdWW Rfe SyncdRW Rfe PodRW
Relax podrw002 No PodRW
Safe=Wse BCSyncdWW BCSyncdRW
Time podrw002 29.80
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Results for src/podrw003.litmus %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
PPC
podrw003
"Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe PodRW"
{0:r2=a; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z; 3:r2=z; 3:r4=a;}
P0 | P1 | P2 | P3 ;
li r1,2 | lwz r1,0(r2) | lwz r1,0(r2) | lwz r1,0(r2) ;
stw r1,0(r2) | sync | sync | li r3,1 ;
sync | li r3,1 | li r3,1 | stw r3,0(r4) ;
li r3,1 | stw r3,0(r4) | stw r3,0(r4) | ;
stw r3,0(r4) | | | ;
exists (a=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1)
Generated assembler
_litmus_P0_0_: li r11,2
_litmus_P0_1_: stw r11,0(r9)
_litmus_P0_2_: sync
_litmus_P0_3_: li r10,1
_litmus_P0_4_: stw r10,0(r2)
_litmus_P1_0_: lwz r8,0(r9)
_litmus_P1_1_: sync
_litmus_P1_2_: li r10,1
_litmus_P1_3_: stw r10,0(r2)
_litmus_P2_0_: lwz r8,0(r9)
_litmus_P2_1_: sync
_litmus_P2_2_: li r10,1
_litmus_P2_3_: stw r10,0(r2)
_litmus_P3_0_: lwz r8,0(r9)
_litmus_P3_1_: li r10,1
_litmus_P3_2_: stw r10,0(r2)
Test podrw003 Allowed
Histogram (15 states)
462 :>1:r1=0; 2:r1=1; 3:r1=1; a=2;
470 :>1:r1=1; 2:r1=0; 3:r1=1; a=2;
431 :>1:r1=1; 2:r1=1; 3:r1=0; a=2;
124 :>1:r1=1; 2:r1=1; 3:r1=1; a=1;
38474 :>1:r1=1; 2:r1=1; 3:r1=0; a=1;
52509 :>1:r1=0; 2:r1=1; 3:r1=1; a=1;
395284:>1:r1=0; 2:r1=0; 3:r1=1; a=2;
5763966:>1:r1=0; 2:r1=0; 3:r1=0; a=2;
3168048:>1:r1=0; 2:r1=0; 3:r1=0; a=1;
2771783:>1:r1=1; 2:r1=0; 3:r1=0; a=1;
2549556:>1:r1=0; 2:r1=1; 3:r1=0; a=1;
1508858:>1:r1=0; 2:r1=1; 3:r1=0; a=2;
3213928:>1:r1=0; 2:r1=0; 3:r1=1; a=1;
168798:>1:r1=1; 2:r1=0; 3:r1=0; a=2;
367309:>1:r1=1; 2:r1=0; 3:r1=1; a=1;
No
Witnesses
Positive: 0, Negative: 20000000
Condition exists (a=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1) is NOT validated
Hash=3ecc0c0abdbd62deb73054a63399a7c3
Cycle=Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe PodRW
Relax podrw003 No PodRW
Safe=Wse BCSyncdWW BCSyncdRW
Time podrw003 40.71
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Results for src/podrw004.litmus %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
PPC
podrw004
"Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe SyncdRW Rfe PodRW"
{0:r2=b; 0:r4=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r4=z; 3:r2=z; 3:r4=a; 4:r2=a; 4:r4=b;}
P0 | P1 | P2 | P3 | P4 ;
li r1,2 | lwz r1,0(r2) | lwz r1,0(r2) | lwz r1,0(r2) | lwz r1,0(r2) ;
stw r1,0(r2) | sync | sync | sync | li r3,1 ;
sync | li r3,1 | li r3,1 | li r3,1 | stw r3,0(r4) ;
li r3,1 | stw r3,0(r4) | stw r3,0(r4) | stw r3,0(r4) | ;
stw r3,0(r4) | | | | ;
exists (b=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1 /\ 4:r1=1)
Generated assembler
_litmus_P0_0_: li r10,2
_litmus_P0_1_: stw r10,0(r9)
_litmus_P0_2_: sync
_litmus_P0_3_: li r11,1
_litmus_P0_4_: stw r11,0(r2)
_litmus_P1_0_: lwz r10,0(r9)
_litmus_P1_1_: sync
_litmus_P1_2_: li r8,1
_litmus_P1_3_: stw r8,0(r2)
_litmus_P2_0_: lwz r10,0(r9)
_litmus_P2_1_: sync
_litmus_P2_2_: li r8,1
_litmus_P2_3_: stw r8,0(r2)
_litmus_P3_0_: lwz r10,0(r9)
_litmus_P3_1_: sync
_litmus_P3_2_: li r8,1
_litmus_P3_3_: stw r8,0(r2)
_litmus_P4_0_: lwz r10,0(r9)
_litmus_P4_1_: li r8,1
_litmus_P4_2_: stw r8,0(r2)
Test podrw004 Allowed
Histogram (31 states)
110 :>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=1; b=2;
247 :>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=1; b=2;
62 :>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=0; b=1;
498 :>1:r1=1; 2:r1=1; 3:r1=1; 4:r1=0; b=2;
53 :>1:r1=1; 2:r1=1; 3:r1=1; 4:r1=1; b=1;
184 :>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=1; b=2;
12202 :>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=1; b=1;
4023 :>1:r1=1; 2:r1=1; 3:r1=1; 4:r1=0; b=1;
19801 :>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=1; b=2;
14939 :>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=1; b=2;
39687 :>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=0; b=2;
26762 :>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=1; b=1;
278570:>1:r1=1; 2:r1=1; 3:r1=0; 4:r1=0; b=1;
493295:>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=1; b=2;
54571 :>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=1; b=2;
1845183:>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=0; b=1;
125845:>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=0; b=2;
135882:>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=0; b=2;
484647:>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=1; b=1;
986151:>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=1; b=1;
2448867:>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=0; b=2;
1998709:>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=0; b=1;
758934:>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=0; b=1;
321625:>1:r1=0; 2:r1=1; 3:r1=1; 4:r1=0; b=1;
949447:>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=0; b=2;
2633782:>1:r1=0; 2:r1=0; 3:r1=0; 4:r1=1; b=1;
35675 :>1:r1=1; 2:r1=0; 3:r1=1; 4:r1=1; b=1;
1779719:>1:r1=0; 2:r1=0; 3:r1=1; 4:r1=0; b=2;
1721720:>1:r1=0; 2:r1=1; 3:r1=0; 4:r1=0; b=2;
1905257:>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=0; b=1;
923553:>1:r1=1; 2:r1=0; 3:r1=0; 4:r1=1; b=1;
No
Witnesses
Positive: 0, Negative: 20000000
Condition exists (b=2 /\ 1:r1=1 /\ 2:r1=1 /\ 3:r1=1 /\ 4:r1=1) is NOT validated
Hash=0a5d1f6d4d1fe8e45903c66be35a69dd
Cycle=Wse SyncdWW Rfe SyncdRW Rfe SyncdRW Rfe SyncdRW Rfe PodRW
Relax podrw004 No PodRW
Safe=Wse BCSyncdWW BCSyncdRW
Time podrw004 47770.31
$Revision: 3163 $
Parameters
#ifndef SIZE_OF_TEST
#define SIZE_OF_TEST 1000000
#endif
#ifndef NUMBER_OF_RUN
#define NUMBER_OF_RUN 1
#endif
#ifndef N_EXE
#define N_EXE (4 < N ? 1 : 4 / N)
#endif
/* gcc options: -Wall -std=gnu99 */
/* barrier: user */
/* tread start/join: changing */
/* memory: indirect */
/* safer: false */
/* preload: true */
/* para: self */
/* changes: false */
/* speedcheck: false */
/* proc used: 4 */
GCCOPTS="-Wall -std=gnu99 "
LITMUSOPTS=-r 20
Wed Dec 23 07:20:38 CET 2009