Test W+WR+WW+rfih0w0+wsih2w0+Ah0

X86_64 W+WR+WW+rfih0w0+wsih2w0+Ah0
"WseAh0h0 Rfih0w0 Frew0h2 Wsih2w0 Wsew0Ah0"
Cycle=Rfih0w0 Frew0h2 Wsih2w0 Wsew0Ah0 WseAh0h0
Generator=diyone7 (version 7.54+05(dev))
Com=Ws Fr Ws
Orig=WseAh0h0 Rfih0w0 Frew0h2 Wsih2w0 Wsew0Ah0
{
2:rax=x; 2:rbx=0x4040404;
}
 P0            | P1            | P2                ;
 movw $257,%ax | movw $514,(x) | movw $771,2(%rax) ;
 xchgw (x),%ax | movl (x),%eax | movl %ebx,(x)     ;
Observed
    x=0x4040101; 1:rax=0x3030202; 0:rax=0x202;