AArch64 MP+posw4q0-poq0q0-posq0w0+posw0q0-poq0q0-posq0w0010
"PosWRw4q0 PodRWq0q0 PosWWq0w0 Rfew0w0 PosRRw0q0 PodRWq0q0 PosWRq0w0 Frew0w4"
Cycle=Rfew0w0 PosRRw0q0 PodRWq0q0 PosWRq0w0 Frew0w4 PosWRw4q0 PodRWq0q0 PosWWq0w0
Relax=[PosRRw0q0,PodRWq0q0,PosWRq0w0] [PosWRw4q0,PodRWq0q0,PosWWq0w0]
Safe=Rfew0w0 Frew0w4
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=PosWRw4q0 PodRWq0q0 PosWWq0w0 Rfew0w0 PosRRw0q0 PodRWq0q0 PosWRq0w0 Frew0w4
{
uint64_t y; uint64_t x; uint64_t 1:X6; uint64_t 1:X5; uint64_t 1:X2; uint64_t 1:X0; uint64_t 0:X2;
0:X0=0x2020202; 0:X1=x; 0:X3=0x101010101010101; 0:X4=y; 0:X5=0x2020202;
1:X1=y; 1:X3=0x101010101010101; 1:X4=x;
}
P0 | P1 ;
STR W0,[X1,#4] | LDR W0,[X1] ;
LDR X2,[X1] | LDR X2,[X1] ;
STR X3,[X4] | STR X3,[X4] ;
STR W5,[X4] | LDR W5,[X4] ;
| LDR X6,[X4] ;
Observed
y=0x101010102020202; x=0x202020201010101; 1:X6=0x101010101010101; 1:X5=0x1010101; 1:X2=0x0; 1:X0=0x2020202; 0:X2=0x202020200000000;
and y=0x101010102020202; x=0x101010101010101; 1:X6=0x101010101010101; 1:X5=0x1010101; 1:X2=0x0; 1:X0=0x2020202; 0:X2=0x202020200000000;