Test MP+poq0l.w0+addrw0w0-rfiw0w0-dataw0w4-rfiw4q0

AArch64 MP+poq0l.w0+addrw0w0-rfiw0w0-dataw0w4-rfiw4q0
"PodWWq0L.w0 RfeL.w0w0 DpAddrdWw0w0 Rfiw0w0 DpDatadWw0w4 Rfiw4q0 Freq0q0"
Cycle=Rfiw0w0 DpDatadWw0w4 Rfiw4q0 Freq0q0 PodWWq0L.w0 RfeL.w0w0 DpAddrdWw0w0
Generator=diycross7 (version 7.52+5(dev))
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=PodWWq0L.w0 RfeL.w0w0 DpAddrdWw0w0 Rfiw0w0 DpDatadWw0w4 Rfiw4q0 Freq0q0
{
uint64_t z; uint64_t y; uint64_t x; uint64_t 1:X8; uint64_t 1:X5; uint64_t 1:X0;

0:X0=144680345676153346; 0:X1=x; 0:X2=16843009; 0:X3=y;
1:X1=y; 1:X3=16843009; 1:X4=z; 1:X7=x;
}
 P0           | P1             ;
 STR X0,[X1]  | LDR W0,[X1]    ;
 STLR W2,[X3] | EOR X2,X0,X0   ;
              | STR W3,[X4,X2] ;
              | LDR W5,[X4]    ;
              | EOR X6,X5,X5   ;
              | ADD W6,W6,W3   ;
              | STR W6,[X7,#4] ;
              | LDR X8,[X7]    ;
Observed
    x=0x101010102020202; 1:X8=0x101010100000000; 1:X5=0x1010101; 1:X0=0x1010101;