Test MP+fence+posrr-ctrlisb+BYTE

AArch64 MP+fence+posrr-ctrlisb+BYTE
"DMB.SYdWWb0b1 Rfeb1h0 PosRRh0b0 DpCtrlIsbdRb0b0 Freb0b0"
{
uint32_t y; uint32_t x; uint32_t 1:X3; uint32_t 1:X0;

0:X1=x; 0:X3=y;
1:X1=y; 1:X4=x;
}
 P0              | P1           ;
 MOV W0,#1       | LDRH W0,[X1] ;
 STRB W0,[X1]    | LDRB W2,[X1] ;
 DMB SY          | CBNZ W2,LC00 ;
 MOV W2,#1       | ISB          ;
 STRB W2,[X3,#1] | LDRB W3,[X4] ;
                 |LC00:         ; 
Observed
    1:X3=0x0; 1:X2=0x0; 1:X0=0x100;