Executions for behaviour: "0:X2=0x2222222211111111 ; x=0x2222222222222222"
AArch64 CO-MIXED-20cc "Coherence test, mixed-size accesses" { uint64_t x = 0; uint64_t 0:X2 = 0; 0:X5 = x; 1:X5 = x; 0:X1 = 0x11111111; uint64_t 1:X1 = 0x2222222222222222; } P0 | P1 ; STR W1,[X5] (* Wx=(_,1) *) | STR X1,[X5] (* Wx=(2,2) *) ; LDR X2,[X5] (* Rx=(2,1) *) | ; Observed x=0x2222222222222222; 0:X2=0x2222222211111111;