Test 2+2W+poq0w4-posw4w4+poq0w0-posw0w0

Executions for behaviour: "0:X5=0x202020203030303 ; 1:X2=0x0 ; 1:X5=0x1010101 ; x=0x202020202020202 ; y=0x303030303030303"

AArch64 2+2W+poq0w4-posw4w4+poq0w0-posw0w0
"PodWWq0w4 PosWWw4w4 Wsew4q0 PodWRq0w0 PosRWw0w0 Wsew0q0"
Cycle=PosRWw0w0 Wsew0q0 PodWWq0w4 PosWWw4w4 Wsew4q0 PodWRq0w0
Relax=[PodWRq0w0,PosRWw0w0] [PodWWq0w4,PosWWw4w4]
Safe=Wsew0q0 Wsew4q0
Prefetch=0:x=F,0:y=W,1:y=F,1:x=W
Com=Ws Ws
Orig=PodWWq0w4 PosWWw4w4 Wsew4q0 PodWRq0w0 PosRWw0w0 Wsew0q0
{
uint64_t y; uint64_t x; uint64_t 1:X5; uint64_t 1:X2; uint64_t 0:X5;

0:X0=0x202020202020202; 0:X1=x; 0:X2=0x1010101; 0:X3=y; 0:X4=0x2020202;
1:X0=0x303030303030303; 1:X1=y; 1:X3=x; 1:X4=0x1010101;
}
 P0             | P1          ;
 STR X0,[X1]    | STR X0,[X1] ;
 STR W2,[X3,#4] | LDR W2,[X3] ;
 STR W4,[X3,#4] | STR W4,[X3] ;
 LDR X5,[X3]    | LDR X5,[X3] ;
Observed
    y=0x303030303030303; x=0x202020202020202; 1:X5=0x1010101; 1:X2=0x0; 0:X5=0x202020203030303;