Test 2+2W+posw0q0-poq0q0-posq0w0+posw4q0-poq0q0-posq0w0002

Executions for behaviour: "y=0x101010102020202 ; x=0x404040404040404 ; 1:X6=0x101010102020202 ; 1:X2=0x303030302020202 ; 0:X6=0x101010102020202"

Executions for behaviour: "y=0x101010102020202 ; x=0x101010102020202 ; 1:X6=0x101010102020202 ; 1:X2=0x303030302020202 ; 0:X6=0x101010102020202"

AArch64 2+2W+posw0q0-poq0q0-posq0w0+posw4q0-poq0q0-posq0w0002
"PosWWw0q0 PodWWq0q0 PosWWq0w0 Wsew0w4 PosWRw4q0 PodRWq0q0 PosWWq0w0 Wsew0w0"
Cycle=Wsew0w0 PosWWw0q0 PodWWq0q0 PosWWq0w0 Wsew0w4 PosWRw4q0 PodRWq0q0 PosWWq0w0
Relax=[PosWWw0q0,PodWWq0q0,PosWWq0w0] [PosWRw4q0,PodRWq0q0,PosWWq0w0]
Safe=Wsew0w0 Wsew0w4
Prefetch=0:x=F,0:y=W,1:y=F,1:x=W
Com=Ws Ws
Orig=PosWWw0q0 PodWWq0q0 PosWWq0w0 Wsew0w4 PosWRw4q0 PodRWq0q0 PosWWq0w0 Wsew0w0
{
uint64_t y; uint64_t x; uint64_t 1:X6; uint64_t 1:X2; uint64_t 0:X6;

0:X0=0x3030303; 0:X1=x; 0:X2=0x404040404040404; 0:X3=0x101010101010101; 0:X4=y; 0:X5=0x2020202;
1:X0=0x3030303; 1:X1=y; 1:X3=0x101010101010101; 1:X4=x; 1:X5=0x2020202;
}
 P0          | P1             ;
 STR W0,[X1] | STR W0,[X1,#4] ;
 STR X2,[X1] | LDR X2,[X1]    ;
 STR X3,[X4] | STR X3,[X4]    ;
 STR W5,[X4] | STR W5,[X4]    ;
 LDR X6,[X4] | LDR X6,[X4]    ;
Observed
    0:X6=0x101010102020202; 1:X2=0x303030302020202; 1:X6=0x101010102020202; x=0x101010102020202; y=0x101010102020202;
and 0:X6=0x101010102020202; 1:X2=0x303030302020202; 1:X6=0x101010102020202; x=0x404040404040404; y=0x101010102020202;