LISA auto/WR-G+WR-G+WR-R+WR-R+WR-R
(*
* Result: Sometimes
*
* Process 0 starts (t=196996).
*
* P0 advances one grace period (t=296996).
*
* P1 advances one grace period (t=396997).
*
* P2 goes back a bit less than one grace period (t=297998).
*
* P3 goes back a bit less than one grace period (t=198999).
*
* P4 goes back a bit less than one grace period (t=100000).
*
* Process 0 start at t=196996, process 5 end at t=100000: Cycle allowed.
*)
{
}
P0 | P1 | P2 | P3 | P4 ;
w[once] x0 2 | w[once] x1 2 | f[rcu_read_lock] | f[rcu_read_lock] | f[rcu_read_lock] ;
f[sync] | f[sync] | w[once] x2 2 | w[once] x3 2 | w[once] x4 2 ;
r[once] r2 x1 | r[once] r2 x2 | r[once] r2 x3 | r[once] r2 x4 | r[once] r2 x0 ;
| | f[rcu_read_unlock] | f[rcu_read_unlock] | f[rcu_read_unlock] ;
Observed
4:r2=2; 3:r2=2; 2:r2=0; 1:r2=0; 0:r2=2;
and 4:r2=2; 3:r2=2; 2:r2=2; 1:r2=2; 0:r2=0;
and 4:r2=2; 3:r2=2; 2:r2=2; 1:r2=0; 0:r2=0;
and 4:r2=2; 3:r2=2; 2:r2=0; 1:r2=0; 0:r2=0;
and 4:r2=0; 3:r2=2; 2:r2=0; 1:r2=0; 0:r2=0;
and 4:r2=2; 3:r2=0; 2:r2=0; 1:r2=0; 0:r2=0;
and 4:r2=0; 3:r2=0; 2:r2=0; 1:r2=0; 0:r2=0;