LISA auto/RW-G+RW-R1I+RW-G+RW-R1I
(*
* Result: Sometimes
*
* Process 0 starts (t=9999999).
*
* P0 advances one grace period (t=10099999).
*
* P1 is unordered, therefore cycle is allowed.
* Skipping remainder of analysis.
*)
{
}
P0 | P1 | P2 | P3 ;
r[once] r1 x0 | f[rcu_read_lock] | r[once] r1 x2 | f[rcu_read_lock] ;
f[sync] | w[once] x2 1 | f[sync] | w[once] x0 1 ;
w[once] x1 1 | f[rcu_read_unlock] | w[once] x3 1 | f[rcu_read_unlock] ;
| r[once] r1 x1 | | r[once] r1 x3 ;
Observed
3:r1=1; 2:r1=1; 1:r1=1; 0:r1=1;