Test auto/RW-G+RW-G+RW-B+RW-B+RW-B

LISA auto/RW-G+RW-G+RW-B+RW-B+RW-B
(*
 * Result: Never
 * 
 * Process 0 starts (t=100000).
 * 
 * P0 advances one grace period (t=200000).
 * 
 * P1 advances one grace period (t=300001).
 * 
 * P2 advances slightly (t=300003).
 * 
 * P3 advances slightly (t=300005).
 * 
 * P4 advances slightly (t=300007).
 * 
 * Process 0 start at t=100000, process 5 end at t=300007: Cycle forbidden.
 *)
{
}
 P0            | P1            | P2            | P3            | P4            ;
 r[once] r1 x0 | r[once] r1 x1 | r[once] r1 x2 | r[once] r1 x3 | r[once] r1 x4 ;
 f[sync]       | f[sync]       | f[mb]         | f[mb]         | f[mb]         ;
 w[once] x1 1  | w[once] x2 1  | w[once] x3 1  | w[once] x4 1  | w[once] x0 1  ;
Observed
    4:r1=0; 3:r1=1; 2:r1=1; 1:r1=1; 0:r1=1;
and 4:r1=1; 3:r1=1; 2:r1=1; 1:r1=0; 0:r1=1;
and 4:r1=0; 3:r1=1; 2:r1=1; 1:r1=0; 0:r1=1;
and 4:r1=1; 3:r1=0; 2:r1=1; 1:r1=0; 0:r1=1;
and 4:r1=1; 3:r1=1; 2:r1=1; 1:r1=1; 0:r1=0;
and 4:r1=0; 3:r1=1; 2:r1=1; 1:r1=1; 0:r1=0;
and 4:r1=1; 3:r1=0; 2:r1=1; 1:r1=1; 0:r1=0;
and 4:r1=0; 3:r1=0; 2:r1=1; 1:r1=1; 0:r1=0;
and 4:r1=0; 3:r1=1; 2:r1=0; 1:r1=1; 0:r1=0;
and 4:r1=0; 3:r1=0; 2:r1=0; 1:r1=1; 0:r1=0;
and 4:r1=1; 3:r1=1; 2:r1=1; 1:r1=0; 0:r1=0;
and 4:r1=0; 3:r1=1; 2:r1=1; 1:r1=0; 0:r1=0;
and 4:r1=0; 3:r1=0; 2:r1=1; 1:r1=0; 0:r1=0;