C WWC+poacquireonces+Release Hash=c5aa8d41153d940dd9c0fe849089743c Cycle=PodRWAcquireOnce RfeOnceAcquire PodRWAcquireOnce WseOnceRelease RfeReleaseAcquire Relax=RfeOnceAcquire WseOnceRelease RfeReleaseAcquire Safe=PodRWAcquireOnce Generator=diy7 (version 7.46+3) Prefetch=1:x=F,1:y=W,2:y=F,2:x=W Com=Rf Rf Ws Orig=RfeReleaseAcquire PodRWAcquireOnce RfeOnceAcquire PodRWAcquireOnce WseOnceRelease {} P0(int* x) { smp_store_release(x,2); } P1(int* x,int* y) { int r0 = smp_load_acquire(x); WRITE_ONCE(*y,1); } P2(int* x,int* y) { int r0 = smp_load_acquire(y); WRITE_ONCE(*x,1); } Observed x=2; 2:r0=1; 1:r0=1; and x=1; 2:r0=1; 1:r0=1;
C11 equivalent:
C WWC+poacquireonces+Release Hash=c5aa8d41153d940dd9c0fe849089743c Cycle=PodRWAcquireOnce RfeOnceAcquire PodRWAcquireOnce WseOnceRelease RfeReleaseAcquire Relax=RfeOnceAcquire WseOnceRelease RfeReleaseAcquire Safe=PodRWAcquireOnce Generator=diy7 (version 7.46+3) Prefetch=1:x=F,1:y=W,2:y=F,2:x=W Com=Rf Rf Ws Orig=RfeReleaseAcquire PodRWAcquireOnce RfeOnceAcquire PodRWAcquireOnce WseOnceRelease {} P0(atomic_int* x) { atomic_store_explicit(x,2,memory_order_release); } P1(atomic_int* x,atomic_int* y) { int r0 = atomic_load_explicit(x,memory_order_acquire); atomic_store_explicit(y,1,memory_order_relaxed); } P2(atomic_int* x,atomic_int* y) { int r0 = atomic_load_explicit(y,memory_order_acquire); atomic_store_explicit(x,1,memory_order_relaxed); } exists (x=2 /\ 1:r0=2 /\ 2:r0=1)