Test Z6.2+sync+addr+fri+addr

PPC Z6.2+sync+addr+fri+addr
"SyncdWW Rfe DpAddrdR Fri Rfe DpAddrdW Wse"
Prefetch=0:x=F,2:x=W
Com=Rf Rf Ws
Orig=SyncdWW Rfe DpAddrdR Fri Rfe DpAddrdW Wse
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r5=z;
2:r2=z; 2:r5=x;
}
 P0           | P1            | P2            ;
 li r1,2      | lwz r1,0(r2)  | lwz r1,0(r2)  ;
 stw r1,0(r2) | xor r3,r1,r1  | xor r3,r1,r1  ;
 sync         | lwzx r4,r3,r5 | li r4,1       ;
 li r3,1      | li r6,1       | stwx r4,r3,r5 ;
 stw r3,0(r4) | stw r6,0(r5)  |               ;
exists
(x=2 /\ 1:r1=1 /\ 1:r4=0 /\ 2:r1=1)