
PPC W+RW+RW+RR+sync+addr+ctrlisync
"Rfe SyncdRW Rfe DpAddrdW Rfe DpCtrlIsyncdR Fre"
Prefetch=0:x=T,3:x=T
Com=Rf Rf Rf Fr
Orig=Rfe SyncdRW Rfe DpAddrdW Rfe DpCtrlIsyncdR Fre
{
0:r2=x;
1:r2=x; 1:r4=y;
2:r2=y; 2:r5=z;
3:r2=z; 3:r4=x;
}
P0 | P1 | P2 | P3 ;
li r1,1 | lwz r1,0(r2) | lwz r1,0(r2) | lwz r1,0(r2) ;
stw r1,0(r2) | sync | xor r3,r1,r1 | cmpw r1,r1 ;
| li r3,1 | li r4,1 | beq LC00 ;
| stw r3,0(r4) | stwx r4,r3,r5 | LC00: ;
| | | isync ;
| | | lwz r3,0(r4) ;
exists
(1:r1=1 /\ 2:r1=1 /\ 3:r1=1 /\ 3:r3=0)