Test ISA14+TER

Dependence (here data) to write followed by same address to load creates order. Forbid.

RISCV ISA14+TER
"Fence.w.wdWW Rfe DpDatadW WsLeave RfBack DpAddrdR Fre"
Generator=diyone7 (version 7.47+4(dev))
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr Rf
Orig=Fence.w.wdWW Rfe DpDatadW WsLeave RfBack DpAddrdR Fre
{
0:x6=x; 0:x8=y;
1:x6=y; 1:x8=z; 1:x12=x;
2:x6=z;
}
 P0          | P1              | P2          ;
 ori x5,x0,1 | lw x5,0(x6)     | ori x5,x0,2 ;
 sw x5,0(x6) | xor x7,x5,x5    | sw x5,0(x6) ;
 fence w,w   | ori x7,x7,1     |             ;
 ori x7,x0,1 | sw x7,0(x8)     |             ;
 sw x7,0(x8) | lw x9,0(x8)     |             ;
             | xor x10,x9,x9   |             ;
             | add x13,x12,x10 |             ;
             | lw x11,0(x13)   |             ;
exists (1:x5=1 /\ 1:x11=0)
/\  (z=2 \/ (z=1 /\ 1:x9=1))