Test MP+dmb.sy+pos-fri-rfi-ctrlisb

AArch64 MP+dmb.sy+pos-fri-rfi-ctrlisb
"DMB.SYdWW Rfe PosRR Fri Rfi DpCtrlIsbdR Fre"
Cycle=Rfi DpCtrlIsbdR Fre DMB.SYdWW Rfe PosRR Fri
Relax=
Safe=Rfi Rfe Fri Fre PosRR DMB.SYdWW DpCtrlIsbdR
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=DMB.SYdWW Rfe PosRR Fri Rfi DpCtrlIsbdR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X6=x;
}
 P0          | P1           ;
 MOV W0,#1   | LDR W0,[X1]  ;
 STR W0,[X1] | LDR W2,[X1]  ;
 DMB SY      | MOV W3,#2    ;
 MOV W2,#1   | STR W3,[X1]  ;
 STR W2,[X3] | LDR W4,[X1]  ;
             | CBNZ W4,LC00 ;
             | LC00:        ;
             | ISB          ;
             | LDR W5,[X6]  ;
Observed
    y=2; x=1; 1:X5=0; 1:X4=2; 1:X2=1; 1:X0=0;