Test MP+dmb.sy+pos-ctrl-ctrlisb

AArch64 MP+dmb.sy+pos-ctrl-ctrlisb
"DMB.SYdWW Rfe PosRR DpCtrldR DpCtrlIsbdR Fre"
Cycle=Rfe PosRR DpCtrldR DpCtrlIsbdR Fre DMB.SYdWW
Relax=
Safe=Rfe Fre PosRR DMB.SYdWW DpCtrldR DpCtrlIsbdR
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=DMB.SYdWW Rfe PosRR DpCtrldR DpCtrlIsbdR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X4=z; 1:X6=x;
}
 P0          | P1           ;
 MOV W0,#1   | LDR W0,[X1]  ;
 STR W0,[X1] | LDR W2,[X1]  ;
 DMB SY      | CBNZ W2,LC00 ;
 MOV W2,#1   | LC00:        ;
 STR W2,[X3] | LDR W3,[X4]  ;
             | CBNZ W3,LC01 ;
             | LC01:        ;
             | ISB          ;
             | LDR W5,[X6]  ;
Observed
    y=1; x=1; 1:X5=1; 1:X2=0; 1:X0=1;