Test MP+dmb.sy+ctrl-addr-data-rfi-pos

AArch64 MP+dmb.sy+ctrl-addr-data-rfi-pos
"DMB.SYdWW Rfe DpCtrldR DpAddrdR DpDatadW Rfi PosRR Fre"
Cycle=Rfi PosRR Fre DMB.SYdWW Rfe DpCtrldR DpAddrdR DpDatadW
Relax=
Safe=Rfi Rfe Fre PosRR DMB.SYdWW DpAddrdR DpDatadW DpCtrldR
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=DMB.SYdWW Rfe DpCtrldR DpAddrdR DpDatadW Rfi PosRR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X3=z; 1:X6=a; 1:X8=x;
}
 P0          | P1                  ;
 MOV W0,#2   | LDR W0,[X1]         ;
 STR W0,[X1] | CBNZ W0,LC00        ;
 DMB SY      | LC00:               ;
 MOV W2,#1   | LDR W2,[X3]         ;
 STR W2,[X3] | EOR W4,W2,W2        ;
             | LDR W5,[X6,W4,SXTW] ;
             | EOR W7,W5,W5        ;
             | ADD W7,W7,#1        ;
             | STR W7,[X8]         ;
             | LDR W9,[X8]         ;
             | LDR W10,[X8]        ;
Observed
    y=1; x=2; 1:X9=2; 1:X10=1; 1:X0=0;