AArch64 W+RWC+poll+poaa+dmb.sy
"PodWWLL RfeLA PodRRAA FreAP DMB.SYdWR FrePL"
Cycle=DMB.SYdWR FrePL PodWWLL RfeLA PodRRAA FreAP
Relax=PodRRAA PodWWLL
Safe=Rfe Fre DMB.SYdWR
Prefetch=0:x=F,0:y=W,1:y=F,1:z=T,2:z=F,2:x=T
Com=Rf Fr Fr
Orig=PodWWLL RfeLA PodRRAA FreAP DMB.SYdWR FrePL
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X3=z;
2:X1=z; 2:X3=x;
}
P0 | P1 | P2 ;
MOV W0,#1 | LDAR W0,[X1] | MOV W0,#1 ;
STLR W0,[X1] | LDAR W2,[X3] | STR W0,[X1] ;
MOV W2,#1 | | DMB SY ;
STLR W2,[X3] | | LDR W2,[X3] ;
exists
(1:X0=1 /\ 1:X2=0 /\ 2:X2=0)