Test IRRWIW+poaa+dmb.sy+LL

AArch64 IRRWIW+poaa+dmb.sy+LL
"RfeLA PodRRAA FreAL RfeLP DMB.SYdRW WsePL"
Cycle=DMB.SYdRW WsePL RfeLA PodRRAA FreAL RfeLP
Relax=PodRRAA
Safe=DMB.SYdRW [FrePL,RfeLP] [WsePL,RfeLP]
Prefetch=1:x=F,1:y=T,3:y=F,3:x=W
Com=Rf Fr Rf Ws
Orig=RfeLA PodRRAA FreAL RfeLP DMB.SYdRW WsePL
{
0:X1=x;
1:X1=x; 1:X3=y;
2:X1=y;
3:X1=y; 3:X3=x;
}
 P0           | P1           | P2           | P3          ;
 MOV W0,#2    | LDAR W0,[X1] | MOV W0,#1    | LDR W0,[X1] ;
 STLR W0,[X1] | LDAR W2,[X3] | STLR W0,[X1] | DMB SY      ;
              |              |              | MOV W2,#1   ;
              |              |              | STR W2,[X3] ;
exists
(x=2 /\ 1:X0=2 /\ 1:X2=0 /\ 3:X0=1)