AArch64 MP+dmb.sy+fri-rfi-addr-addr-rfi
"DMB.SYdWW Rfe Fri Rfi DpAddrdR DpAddrdW Rfi Fre"
Cycle=Rfi Fre DMB.SYdWW Rfe Fri Rfi DpAddrdR DpAddrdW
Relax=
Safe=Rfi Rfe Fri Fre DMB.SYdWW DpAddrdW DpAddrdR
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=DMB.SYdWW Rfe Fri Rfi DpAddrdR DpAddrdW Rfi Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X6=z; 1:X9=x;
}
P0 | P1 ;
MOV W0,#2 | LDR W0,[X1] ;
STR W0,[X1] | MOV W2,#2 ;
DMB SY | STR W2,[X1] ;
MOV W2,#1 | LDR W3,[X1] ;
STR W2,[X3] | EOR W4,W3,W3 ;
| LDR W5,[X6,W4,SXTW] ;
| EOR W7,W5,W5 ;
| MOV W8,#1 ;
| STR W8,[X9,W7,SXTW] ;
| LDR W10,[X9] ;
Observed
y=2; x=2; 1:X3=2; 1:X10=2; 1:X0=1;
and y=2; x=2; 1:X3=2; 1:X10=1; 1:X0=1;