Test MP+dmb.sy+addr-rfi-pos-addr-pos

AArch64 MP+dmb.sy+addr-rfi-pos-addr-pos
"DMB.SYdWW Rfe DpAddrdW Rfi PosRR DpAddrdR PosRR Fre"
Cycle=Rfi PosRR DpAddrdR PosRR Fre DMB.SYdWW Rfe DpAddrdW
Relax=
Safe=Rfi Rfe Fre PosRR DMB.SYdWW DpAddrdW DpAddrdR
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=DMB.SYdWW Rfe DpAddrdW Rfi PosRR DpAddrdR PosRR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X4=z; 1:X9=x;
}
 P0          | P1                  ;
 MOV W0,#1   | LDR W0,[X1]         ;
 STR W0,[X1] | EOR W2,W0,W0        ;
 DMB SY      | MOV W3,#1           ;
 MOV W2,#1   | STR W3,[X4,W2,SXTW] ;
 STR W2,[X3] | LDR W5,[X4]         ;
             | LDR W6,[X4]         ;
             | EOR W7,W6,W6        ;
             | LDR W8,[X9,W7,SXTW] ;
             | LDR W10,[X9]        ;
Observed
    z=1; y=1; x=1; 1:X8=1; 1:X6=1; 1:X5=1; 1:X10=0; 1:X0=1;