Test Z6.1+dmb.sts

AArch64 Z6.1+dmb.sts
"DMB.STdWW Wse DMB.STdWW Rfe DMB.STdRW Wse"
Cycle=Rfe DMB.STdRW Wse DMB.STdWW Wse DMB.STdWW
Relax=
Safe=Rfe Wse DMB.STdWW DMB.STdRW
Prefetch=0:x=F,0:y=W,1:y=F,1:z=W,2:z=F,2:x=W
Com=Ws Rf Ws
Orig=DMB.STdWW Wse DMB.STdWW Rfe DMB.STdRW Wse
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X3=z;
2:X1=z; 2:X3=x;
}
 P0          | P1          | P2          ;
 MOV W0,#2   | MOV W0,#2   | LDR W0,[X1] ;
 STR W0,[X1] | STR W0,[X1] | DMB ST      ;
 DMB ST      | DMB ST      | MOV W2,#1   ;
 MOV W2,#1   | MOV W2,#1   | STR W2,[X3] ;
 STR W2,[X3] | STR W2,[X3] |             ;
Observed
    y=2; x=2; 2:X0=1;