PLDI11 vs. Model |
This note lists the differences between ppcmem, the simulator of the PLDI11 model, and herd (on the Power architecture). Notice that ppcmem does not always terminate in the allocated time and memory bounds, so that this comparison does not cover all our test set.
We take the following, quite unexpected, behaviour to be a bug of ppcmem, as eieio was added afterhand.
PLDI11 | Model | PowerG5 | Power6 | Power7 | |
Z6.1+sync+eieio+addr | Allow | Forbid | No, 0/3.9G | No, 0/1.0G | No, 0/27G |
Allow unseen | Allow unseen | Allow unseen |
Morever, if we replace eieio by lwsync the resulting test Z6.1+sync+lwsync+addr is forbidden by the two models. We see no reason for eieio and lwsync to differ here.
PLDI11 | Model | PowerG5 | Power6 | Power7 | |
Z6.1+sync+lwsync+addr | Forbid | Forbid | 0/4.9G | 0/1.7G | 0/38G |
The following table lists the behaviours that are allowed by our model yet forbidden by PLDI’11:
PLDI11 | Model | PowerG5 | Power6 | Power7 | |
MP+sync+ctrl-detr | Forbid | Allow | No, 0/3.1G | — | Ok, 12k/34G |
Allow unseen | |||||
DETOUR0821 | Forbid | Allow | Ok, 2/3.6G | No, 0/3.4G | Ok, 25k/43G |
Allow unseen | |||||
MP+lwsync+addr-po-detr | Forbid | Allow | Ok, 3/2.9G | — | Ok, 21k/31G |
MP+sync+addr-po-detr | Forbid | Allow | Ok, 1/2.9G | — | Ok, 17k/31G |
As those behaviours are observed on Power7 hardware, the above table also demonstrates that the PLDI’11 model is invalidated by hardware experiments.
This document was translated from LATEX by HEVEA.