Test IRIW+dmb+addr

ARM IRIW+dmb+addr
"Rfe DMBdRR Fre Rfe DpAddrdR Fre"
Cycle=Rfe DMBdRR Fre Rfe DpAddrdR Fre
{
%x0=x;
%x1=x; %y1=y;
%y2=y;
%y3=y; %x3=x;
}
 P0            | P1            | P2            | P3               ;
 MOV R0, #1    | LDR R0, [%x1] | MOV R0, #1    | LDR R0, [%y3]    ;
 STR R0, [%x0] | DMB           | STR R0, [%y2] | EOR R1,R0,R0     ;
               | LDR R1, [%y1] |               | LDR R2, [R1,%x3] ;
Observed
    1:R0=1; 1:R1=0; 3:R0=1; 3:R2=0;