Executions for behaviour:
"0:R1=0 ; 1:R1=0"
ARM SB+dmb.sts "DMB.STdWR Fre DMB.STdWR Fre" Cycle=Fre DMB.STdWR Fre DMB.STdWR Prefetch=0:x=F,0:y=T,1:y=F,1:x=T Com=Fr Fr Orig=DMB.STdWR Fre DMB.STdWR Fre { %x0=x; %y0=y; %y1=y; %x1=x; } P0 | P1 ; MOV R0,#1 | MOV R0,#1 ; STR R0,[%x0] | STR R0,[%y1] ; DMB ST | DMB ST ; LDR R1,[%y0] | LDR R1,[%x1] ; Observed 0:R1=0; 1:R1=0;