Test S+dmb+fri-rfi-pos-addr-pos-addr

Executions for behaviour: "1:R0=1 ; 1:R2=2 ; 1:R3=2 ; x=2 ; y=2"

ARM S+dmb+fri-rfi-pos-addr-pos-addr
"DMBdWW Rfe Fri Rfi PosRR DpAddrdR PosRR DpAddrdW Wse"
Cycle=Rfi PosRR DpAddrdR PosRR DpAddrdW Wse DMBdWW Rfe Fri
Prefetch=0:x=F,0:y=W,1:y=F,1:x=W
Com=Rf Ws
Orig=DMBdWW Rfe Fri Rfi PosRR DpAddrdR PosRR DpAddrdW Wse
{
%x0=x; %y0=y;
%y1=y; %z1=z; %x1=x;
}
 P0           | P1              ;
 MOV R0,#2    | LDR R0,[%y1]    ;
 STR R0,[%x0] | MOV R1,#2       ;
 DMB          | STR R1,[%y1]    ;
 MOV R1,#1    | LDR R2,[%y1]    ;
 STR R1,[%y0] | LDR R3,[%y1]    ;
              | EOR R4,R3,R3    ;
              | LDR R5,[R4,%z1] ;
              | LDR R6,[%z1]    ;
              | EOR R7,R6,R6    ;
              | MOV R8,#1       ;
              | STR R8,[R7,%x1] ;
Observed
    1:R0=1; 1:R2=2; 1:R3=2; x=2; y=2;