ARM MP0157 "DMBdWW Rfe DpAddrdR DpAddrdW PodWR Fre" Cycle=Rfe DpAddrdR DpAddrdW PodWR Fre DMBdWW Relax=[Fre,DMBdWW,Rfe] Safe=PodWR DpAddrdW DpAddrdR Prefetch=0:x=F,0:y=W,1:y=F,1:x=T Com=Rf Fr Orig=DMBdWW Rfe DpAddrdR DpAddrdW PodWR Fre { %x0=x; %y0=y; %y1=y; %z1=z; %a1=a; %x1=x; } P0 | P1 ; MOV R0,#1 | LDR R0,[%y1] ; STR R0,[%x0] | EOR R1,R0,R0 ; DMB | LDR R2,[R1,%z1] ; MOV R1,#1 | EOR R3,R2,R2 ; STR R1,[%y0] | MOV R4,#1 ; | STR R4,[R3,%a1] ; | LDR R5,[%x1] ; Observed 1:R0=1; 1:R5=0;