Test MP+dmb+pos-data-wsi-rfi-addr-rfi

Executions for behaviour: "1:R0=1 ; 1:R1=0 ; 1:R4=2 ; 1:R7=1 ; x=1 ; z=2"

Executions for behaviour: "1:R0=1 ; 1:R1=1 ; 1:R4=2 ; 1:R7=1 ; x=2 ; z=2"

Executions for behaviour: "1:R0=1 ; 1:R1=1 ; 1:R4=2 ; 1:R7=2 ; x=2 ; z=2"

ARM MP+dmb+pos-data-wsi-rfi-addr-rfi
"DMBdWW Rfe PosRR DpDatadW Wsi Rfi DpAddrdW Rfi Fre"
Cycle=Rfi Fre DMBdWW Rfe PosRR DpDatadW Wsi Rfi DpAddrdW
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=DMBdWW Rfe PosRR DpDatadW Wsi Rfi DpAddrdW Rfi Fre
{
%x0=x; %y0=y;
%y1=y; %z1=z; %x1=x;
}
 P0           | P1              ;
 MOV R0,#2    | LDR R0,[%y1]    ;
 STR R0,[%x0] | LDR R1,[%y1]    ;
 DMB          | EOR R2,R1,R1    ;
 MOV R1,#1    | ADD R2,R2,#1    ;
 STR R1,[%y0] | STR R2,[%z1]    ;
              | MOV R3,#2       ;
              | STR R3,[%z1]    ;
              | LDR R4,[%z1]    ;
              | EOR R5,R4,R4    ;
              | MOV R6,#1       ;
              | STR R6,[R5,%x1] ;
              | LDR R7,[%x1]    ;
Observed
    1:R0=1; 1:R1=0; 1:R4=2; 1:R7=1; x=1; z=2;
and 1:R0=1; 1:R1=1; 1:R4=2; 1:R7=1; x=2; z=2;
and 1:R0=1; 1:R1=1; 1:R4=2; 1:R7=2; x=2; z=2;