Test MP0133

PPC MP0133
"LwSyncdWW Rfe DpDatadW PodWW PosWR Fre"
Cycle=Rfe DpDatadW PodWW PosWR Fre LwSyncdWW
Relax=[Fre,LwSyncdWW,Rfe]
Safe=PosWR PodWW DpDatadW
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=LwSyncdWW Rfe DpDatadW PodWW PosWR Fre
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r4=z; 1:r6=x;
}
 P0           | P1           ;
 li r1,2      | lwz r1,0(r2) ;
 stw r1,0(r2) | xor r3,r1,r1 ;
 lwsync       | addi r3,r3,1 ;
 li r3,1      | stw r3,0(r4) ;
 stw r3,0(r4) | li r5,1      ;
              | stw r5,0(r6) ;
              | lwz r7,0(r6) ;
Observed
    1:r1=1; 1:r7=1; x=2;
and 1:r1=1; 1:r7=2; x=2;